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authorLucas Stach <dev@lynxeye.de>2012-12-20 00:17:33 +0100
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-12-24 15:59:10 +0000
commit919ad49c214adcc80578c7a02efd3fe8460e0797 (patch)
tree048b7f4d0ffa880bf1adfd288db96ee12c3b0872 /sound/soc/tegra
parenta49f0d1ea3ec94fc7cf33a7c36a16343b74bd565 (diff)
downloadop-kernel-dev-919ad49c214adcc80578c7a02efd3fe8460e0797.zip
op-kernel-dev-919ad49c214adcc80578c7a02efd3fe8460e0797.tar.gz
ASoC: tegra: add function to set ac97 rate
AC97 uses a fixed rate, unrelated to the sample rate. Add a function to make the setup more trivial. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/tegra')
-rw-r--r--sound/soc/tegra/tegra_asoc_utils.c53
-rw-r--r--sound/soc/tegra/tegra_asoc_utils.h1
2 files changed, 54 insertions, 0 deletions
diff --git a/sound/soc/tegra/tegra_asoc_utils.c b/sound/soc/tegra/tegra_asoc_utils.c
index 6872c77..ba419f8 100644
--- a/sound/soc/tegra/tegra_asoc_utils.c
+++ b/sound/soc/tegra/tegra_asoc_utils.c
@@ -112,6 +112,59 @@ int tegra_asoc_utils_set_rate(struct tegra_asoc_utils_data *data, int srate,
}
EXPORT_SYMBOL_GPL(tegra_asoc_utils_set_rate);
+int tegra_asoc_utils_set_ac97_rate(struct tegra_asoc_utils_data *data)
+{
+ const int pll_rate = 73728000;
+ const int ac97_rate = 24576000;
+ int err;
+
+ clk_disable_unprepare(data->clk_cdev1);
+ clk_disable_unprepare(data->clk_pll_a_out0);
+ clk_disable_unprepare(data->clk_pll_a);
+
+ /*
+ * AC97 rate is fixed at 24.576MHz and is used for both the host
+ * controller and the external codec
+ */
+ err = clk_set_rate(data->clk_pll_a, pll_rate);
+ if (err) {
+ dev_err(data->dev, "Can't set pll_a rate: %d\n", err);
+ return err;
+ }
+
+ err = clk_set_rate(data->clk_pll_a_out0, ac97_rate);
+ if (err) {
+ dev_err(data->dev, "Can't set pll_a_out0 rate: %d\n", err);
+ return err;
+ }
+
+ /* Don't set cdev1/extern1 rate; it's locked to pll_a_out0 */
+
+ err = clk_prepare_enable(data->clk_pll_a);
+ if (err) {
+ dev_err(data->dev, "Can't enable pll_a: %d\n", err);
+ return err;
+ }
+
+ err = clk_prepare_enable(data->clk_pll_a_out0);
+ if (err) {
+ dev_err(data->dev, "Can't enable pll_a_out0: %d\n", err);
+ return err;
+ }
+
+ err = clk_prepare_enable(data->clk_cdev1);
+ if (err) {
+ dev_err(data->dev, "Can't enable cdev1: %d\n", err);
+ return err;
+ }
+
+ data->set_baseclock = pll_rate;
+ data->set_mclk = ac97_rate;
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(tegra_asoc_utils_set_ac97_rate);
+
int tegra_asoc_utils_init(struct tegra_asoc_utils_data *data,
struct device *dev)
{
diff --git a/sound/soc/tegra/tegra_asoc_utils.h b/sound/soc/tegra/tegra_asoc_utils.h
index 44db1db..974c9f8 100644
--- a/sound/soc/tegra/tegra_asoc_utils.h
+++ b/sound/soc/tegra/tegra_asoc_utils.h
@@ -43,6 +43,7 @@ struct tegra_asoc_utils_data {
int tegra_asoc_utils_set_rate(struct tegra_asoc_utils_data *data, int srate,
int mclk);
+int tegra_asoc_utils_set_ac97_rate(struct tegra_asoc_utils_data *data);
int tegra_asoc_utils_init(struct tegra_asoc_utils_data *data,
struct device *dev);
void tegra_asoc_utils_fini(struct tegra_asoc_utils_data *data);
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