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| author | Max Filippov <jcmvbkbc@gmail.com> | 2014-12-26 20:19:38 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-01-08 19:52:11 +0000 |
| commit | 57b7068de5d0cca8ac6e21085b843c1bbd49d3f4 (patch) | |
| tree | 7f967c6eada43604a8dd30e88141f70bbc4e91b5 /sound/soc/tegra/Makefile | |
| parent | 97bf6af1f928216fd6c5a66e8a57bfa95a659672 (diff) | |
| download | op-kernel-dev-57b7068de5d0cca8ac6e21085b843c1bbd49d3f4.zip op-kernel-dev-57b7068de5d0cca8ac6e21085b843c1bbd49d3f4.tar.gz | |
ASoC: add xtensa xtfpga I2S interface and platform
XTFPGA boards provides an audio subsystem that consists of TI CDCE706
clock synthesizer, I2S transmitter and TLV320AIC23 audio codec.
I2S transmitter has MMIO-based interface that resembles that of the
OpenCores I2S transmitter. I2S transmitter is always a master on I2S
bus. There's no specialized audio DMA, sample data are transferred to
I2S transmitter FIFO by CPU through memory-mapped queue interface.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/tegra/Makefile')
0 files changed, 0 insertions, 0 deletions
