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authorMark Brown <broonie@opensource.wolfsonmicro.com>2011-04-04 17:55:42 +0900
committerMark Brown <broonie@opensource.wolfsonmicro.com>2011-04-05 08:26:08 +0900
commit34bad69cf63efc761b05f603d99e121b83635c08 (patch)
tree645e50ceddcee4e8b89e528f0f391211781b7362 /sound/soc/soc-cache.c
parentd420d40e9c044e8fae7957ed82cd63d2afe4147f (diff)
downloadop-kernel-dev-34bad69cf63efc761b05f603d99e121b83635c08.zip
op-kernel-dev-34bad69cf63efc761b05f603d99e121b83635c08.tar.gz
ASoC: Fix comment width in soc-cache.c
Lines should be less than 80 columns. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/soc-cache.c')
-rw-r--r--sound/soc/soc-cache.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/sound/soc/soc-cache.c b/sound/soc/soc-cache.c
index ed67c16..f46a198 100644
--- a/sound/soc/soc-cache.c
+++ b/sound/soc/soc-cache.c
@@ -393,10 +393,11 @@ static int snd_soc_16_16_spi_write(void *control_data, const char *data,
#define snd_soc_16_16_spi_write NULL
#endif
-/* Primitive bulk write support for soc-cache. The data pointed to by `data' needs
- * to already be in the form the hardware expects including any leading register specific
- * data. Any data written through this function will not go through the cache as it
- * only handles writing to volatile or out of bounds registers.
+/* Primitive bulk write support for soc-cache. The data pointed to by
+ * `data' needs to already be in the form the hardware expects
+ * including any leading register specific data. Any data written
+ * through this function will not go through the cache as it only
+ * handles writing to volatile or out of bounds registers.
*/
static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int reg,
const void *data, size_t len)
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