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authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2014-05-08 17:44:49 -0700
committerMark Brown <broonie@linaro.org>2014-05-13 19:06:16 +0100
commitbff58ea4f43d9b4a9fd6fb05fabc8f50f68131f5 (patch)
tree75fd6981582c0206a5152a6c9d377e3295a2eebf /sound/soc/sh/rcar/gen.c
parent68b6af3656a1f3303cca094a19e26653fad1853a (diff)
downloadop-kernel-dev-bff58ea4f43d9b4a9fd6fb05fabc8f50f68131f5.zip
op-kernel-dev-bff58ea4f43d9b4a9fd6fb05fabc8f50f68131f5.tar.gz
ASoC: rsnd: add DVC support
This patch adds DVC (Digital Volume Controller) support which is member of CMD unit. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'sound/soc/sh/rcar/gen.c')
-rw-r--r--sound/soc/sh/rcar/gen.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/sound/soc/sh/rcar/gen.c b/sound/soc/sh/rcar/gen.c
index 50a1ef3..a135d4c 100644
--- a/sound/soc/sh/rcar/gen.c
+++ b/sound/soc/sh/rcar/gen.c
@@ -181,6 +181,8 @@ static int rsnd_gen2_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen)
RSND_GEN2_M_REG(gen, SCU, SRC_BUSIF_MODE, 0x0, 0x20),
RSND_GEN2_M_REG(gen, SCU, SRC_ROUTE_MODE0,0xc, 0x20),
RSND_GEN2_M_REG(gen, SCU, SRC_CTRL, 0x10, 0x20),
+ RSND_GEN2_M_REG(gen, SCU, CMD_ROUTE_SLCT, 0x18c, 0x20),
+ RSND_GEN2_M_REG(gen, SCU, CMD_CTRL, 0x190, 0x20),
RSND_GEN2_M_REG(gen, SCU, SRC_SWRSR, 0x200, 0x40),
RSND_GEN2_M_REG(gen, SCU, SRC_SRCIR, 0x204, 0x40),
RSND_GEN2_M_REG(gen, SCU, SRC_ADINR, 0x214, 0x40),
@@ -189,6 +191,14 @@ static int rsnd_gen2_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen)
RSND_GEN2_M_REG(gen, SCU, SRC_SRCCR, 0x224, 0x40),
RSND_GEN2_M_REG(gen, SCU, SRC_BSDSR, 0x22c, 0x40),
RSND_GEN2_M_REG(gen, SCU, SRC_BSISR, 0x238, 0x40),
+ RSND_GEN2_M_REG(gen, SCU, DVC_SWRSR, 0xe00, 0x100),
+ RSND_GEN2_M_REG(gen, SCU, DVC_DVUIR, 0xe04, 0x100),
+ RSND_GEN2_M_REG(gen, SCU, DVC_ADINR, 0xe08, 0x100),
+ RSND_GEN2_M_REG(gen, SCU, DVC_DVUCR, 0xe10, 0x100),
+ RSND_GEN2_M_REG(gen, SCU, DVC_ZCMCR, 0xe14, 0x100),
+ RSND_GEN2_M_REG(gen, SCU, DVC_VOL0R, 0xe28, 0x100),
+ RSND_GEN2_M_REG(gen, SCU, DVC_VOL1R, 0xe2c, 0x100),
+ RSND_GEN2_M_REG(gen, SCU, DVC_DVUER, 0xe48, 0x100),
RSND_GEN2_S_REG(gen, ADG, BRRA, 0x00),
RSND_GEN2_S_REG(gen, ADG, BRRB, 0x04),
@@ -207,6 +217,7 @@ static int rsnd_gen2_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen)
RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL2, 0x50),
RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL3, 0x54),
RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL4, 0x58),
+ RSND_GEN2_S_REG(gen, ADG, CMDOUT_TIMSEL, 0x5c),
RSND_GEN2_M_REG(gen, SSI, SSICR, 0x00, 0x40),
RSND_GEN2_M_REG(gen, SSI, SSISR, 0x04, 0x40),
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