diff options
| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-12-11 11:31:22 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-12-12 12:59:11 +0800 |
| commit | 3628137646e2ee25c9e46ba9d2c20b313e4a1a25 (patch) | |
| tree | 68d0dff220f90369d531989f6d97f84e16607312 /sound/soc/samsung/speyside.c | |
| parent | 0a105ddb35aa702d975cb902d8d2c0cde4f1f231 (diff) | |
| download | op-kernel-dev-3628137646e2ee25c9e46ba9d2c20b313e4a1a25.zip op-kernel-dev-3628137646e2ee25c9e46ba9d2c20b313e4a1a25.tar.gz | |
ASoC: Raise Speyside audio system clock rate to 512fs
To support advanced system functionality for additional components; the
actively used clocks will remain the same for current components. Also
factor the rate out to a single #define while we're at it.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/samsung/speyside.c')
| -rw-r--r-- | sound/soc/samsung/speyside.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/sound/soc/samsung/speyside.c b/sound/soc/samsung/speyside.c index 18e6356..0222d86 100644 --- a/sound/soc/samsung/speyside.c +++ b/sound/soc/samsung/speyside.c @@ -19,6 +19,7 @@ #include "../codecs/wm9081.h" #define WM8996_HPSEL_GPIO 214 +#define MCLK_AUDIO_RATE (512 * 48000) static int speyside_set_bias_level(struct snd_soc_card *card, struct snd_soc_dapm_context *dapm, @@ -67,7 +68,7 @@ static int speyside_set_bias_level_post(struct snd_soc_card *card, if (card->dapm.bias_level == SND_SOC_BIAS_STANDBY) { ret = snd_soc_dai_set_pll(codec_dai, 0, WM8996_FLL_MCLK2, - 32768, 48000 * 256); + 32768, MCLK_AUDIO_RATE); if (ret < 0) { pr_err("Failed to start FLL\n"); return ret; @@ -75,7 +76,7 @@ static int speyside_set_bias_level_post(struct snd_soc_card *card, ret = snd_soc_dai_set_sysclk(codec_dai, WM8996_SYSCLK_FLL, - 48000 * 256, + MCLK_AUDIO_RATE, SND_SOC_CLOCK_IN); if (ret < 0) return ret; @@ -224,7 +225,7 @@ static int speyside_wm9081_init(struct snd_soc_dapm_context *dapm) { /* At any time the WM9081 is active it will have this clock */ return snd_soc_codec_set_sysclk(dapm->codec, WM9081_SYSCLK_MCLK, 0, - 48000 * 256, 0); + MCLK_AUDIO_RATE, 0); } static struct snd_soc_aux_dev speyside_aux_dev[] = { |
