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authorGuennadi Liakhovetski <g.liakhovetski@gmx.de>2010-01-29 15:31:06 +0100
committerMark Brown <broonie@opensource.wolfsonmicro.com>2010-01-29 14:32:52 +0000
commitb2c3e923110f6ca60ccb30cf4a6bda5211454c4f (patch)
treea49311b0231b3887122ec23771a7b32b54f37bd7 /sound/soc/codecs/wm8978.h
parent660c63a4a289a835aa9af93a45884c5d0c004b20 (diff)
downloadop-kernel-dev-b2c3e923110f6ca60ccb30cf4a6bda5211454c4f.zip
op-kernel-dev-b2c3e923110f6ca60ccb30cf4a6bda5211454c4f.tar.gz
ASoC: clean up wm8974 and wm8978 clock divider handling
wm8974 and wm8978 codec drivers control DAC and ADC oversampling rates in their .set_clkdiv() methods, which is wrong, because these are simple boolean switches and not clock dividers. Move these bits to sound controls. Also remove manual configuration of the MCLK divider in wm8978, since it is configured automatically. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/codecs/wm8978.h')
-rw-r--r--sound/soc/codecs/wm8978.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/sound/soc/codecs/wm8978.h b/sound/soc/codecs/wm8978.h
index b58f0bf..56ec832 100644
--- a/sound/soc/codecs/wm8978.h
+++ b/sound/soc/codecs/wm8978.h
@@ -72,9 +72,6 @@
/* Clock divider Id's */
enum wm8978_clk_id {
WM8978_OPCLKRATE,
- WM8978_MCLKDIV,
- WM8978_ADCCLK,
- WM8978_DACCLK,
WM8978_BCLKDIV,
};
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