diff options
| author | Markus Pargmann <mpa@pengutronix.de> | 2014-01-27 13:03:06 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@linaro.org> | 2014-01-27 18:13:44 +0000 |
| commit | 609e6025b8ed347c5eba54eb12357193e46dd34f (patch) | |
| tree | 1c5864982f36bbd8fb3f8c4f8ccc271859617629 /sound/soc/codecs/tlv320aic32x4.c | |
| parent | b44aa40f875b06b1986a18251d601ee1832c4476 (diff) | |
| download | op-kernel-dev-609e6025b8ed347c5eba54eb12357193e46dd34f.zip op-kernel-dev-609e6025b8ed347c5eba54eb12357193e46dd34f.tar.gz | |
ASoC: tlv320aic32x4: Fix MICPGA input configuration
Currently the Negative Terminal Input Routing Configuration is only set
when there is a special routing configuration. If we don't use one of
the inputs IN1 or IN2 as negative terminal input, the PGA and recording
does not work.
This patch adds a route from CM1L/CM1R to the PGA as negative input by
default. With this configuration the PGA can amplify all input signals
and line-in/mic works again.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'sound/soc/codecs/tlv320aic32x4.c')
| -rw-r--r-- | sound/soc/codecs/tlv320aic32x4.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c index ee9ad05..688151b 100644 --- a/sound/soc/codecs/tlv320aic32x4.c +++ b/sound/soc/codecs/tlv320aic32x4.c @@ -618,12 +618,14 @@ static int aic32x4_probe(struct snd_soc_codec *codec) snd_soc_write(codec, AIC32X4_CMMODE, tmp_reg); /* Mic PGA routing */ - if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K) { + if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K) snd_soc_write(codec, AIC32X4_LMICPGANIN, AIC32X4_LMICPGANIN_IN2R_10K); - } - if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K) { + else + snd_soc_write(codec, AIC32X4_LMICPGANIN, AIC32X4_LMICPGANIN_CM1L_10K); + if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K) snd_soc_write(codec, AIC32X4_RMICPGANIN, AIC32X4_RMICPGANIN_IN1L_10K); - } + else + snd_soc_write(codec, AIC32X4_RMICPGANIN, AIC32X4_RMICPGANIN_CM1R_10K); aic32x4_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
