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authorTakashi Iwai <tiwai@suse.de>2005-10-27 20:56:35 +0200
committerJaroslav Kysela <perex@suse.cz>2005-11-04 13:20:34 +0100
commit091e95ee7febf894603475c44d51f8ec4fab4328 (patch)
tree926e87397150b5d635e2ed113809bbb1957844ea /sound/pci
parentbeef08a54524e4a657bfb66b6b9758f8bc54fd17 (diff)
downloadop-kernel-dev-091e95ee7febf894603475c44d51f8ec4fab4328.zip
op-kernel-dev-091e95ee7febf894603475c44d51f8ec4fab4328.tar.gz
[ALSA] ac97 - Fix confliction of DRA and surround slots
Modules: AC97 Codec Fixed the confliction of DRA and surround slots 7/8. Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/pci')
-rw-r--r--sound/pci/ac97/ac97_codec.c2
-rw-r--r--sound/pci/ac97/ac97_pcm.c9
2 files changed, 11 insertions, 0 deletions
diff --git a/sound/pci/ac97/ac97_codec.c b/sound/pci/ac97/ac97_codec.c
index 3b58910..9bde76c 100644
--- a/sound/pci/ac97/ac97_codec.c
+++ b/sound/pci/ac97/ac97_codec.c
@@ -2046,6 +2046,8 @@ int snd_ac97_mixer(ac97_bus_t *bus, ac97_template_t *template, ac97_t **rac97)
snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE, AC97_GP_DRSS_MASK, AC97_GP_DRSS_78);
if ((snd_ac97_read(ac97, AC97_GENERAL_PURPOSE) & AC97_GP_DRSS_MASK) == AC97_GP_DRSS_78)
ac97->flags |= AC97_DOUBLE_RATE;
+ /* restore to slots 10/11 to avoid the confliction with surrounds */
+ snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE, AC97_GP_DRSS_MASK, 0);
}
if (ac97->ext_id & AC97_EI_VRA) { /* VRA support */
snd_ac97_determine_rates(ac97, AC97_PCM_FRONT_DAC_RATE, 0, &ac97->rates[AC97_RATES_FRONT_DAC]);
diff --git a/sound/pci/ac97/ac97_pcm.c b/sound/pci/ac97/ac97_pcm.c
index dd289b9..ded1316 100644
--- a/sound/pci/ac97/ac97_pcm.c
+++ b/sound/pci/ac97/ac97_pcm.c
@@ -303,6 +303,15 @@ int snd_ac97_set_rate(ac97_t *ac97, int reg, unsigned int rate)
AC97_EA_DRA, dbl ? AC97_EA_DRA : 0);
snd_ac97_update(ac97, reg, tmp & 0xffff);
snd_ac97_read(ac97, reg);
+ if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE) {
+ /* Intel controllers require double rate data to be put in
+ * slots 7+8
+ */
+ snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE,
+ AC97_GP_DRSS_MASK,
+ dbl ? AC97_GP_DRSS_78 : 0);
+ snd_ac97_read(ac97, AC97_GENERAL_PURPOSE);
+ }
return 0;
}
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