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authorNishanth Aravamudan <nacc@us.ibm.com>2005-07-09 10:13:22 +0200
committerJaroslav Kysela <perex@suse.cz>2005-07-28 12:22:13 +0200
commitef21ca24faf28df6d06939e77d5032a313490289 (patch)
tree1c6c719f4671b803f1288eb8cdca18587ec2eb62 /sound/pci/cs46xx
parent072c01194df6e4843582d09380b780987f642d6d (diff)
downloadop-kernel-dev-ef21ca24faf28df6d06939e77d5032a313490289.zip
op-kernel-dev-ef21ca24faf28df6d06939e77d5032a313490289.tar.gz
[ALSA] sound/pci: fix-up sleeping paths
ENS1370/1+ driver,ES1968 driver,Intel8x0 driver,VIA82xx driver VIA82xx-modem driver,AC97 Codec,ALI5451 driver,CS46xx driver MIXART driver,RME HDSP driver,Trident driver,YMFPCI driver Description: Fix-up sleeping in sound/pci. These changes fall under the following two categories: 1) Replace schedule_timeout() with msleep() to guarantee the task delays as expected. This also involved replacing/removing custom sleep functions. 2) Do not assume jiffies will only increment by one if you request a 1 jiffy sleep, i.e. use time_after/time_before in while loops. Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com> Signed-off-by: Jaroslav Kysela <perex@suse.cz>
Diffstat (limited to 'sound/pci/cs46xx')
-rw-r--r--sound/pci/cs46xx/cs46xx_lib.c15
1 files changed, 5 insertions, 10 deletions
diff --git a/sound/pci/cs46xx/cs46xx_lib.c b/sound/pci/cs46xx/cs46xx_lib.c
index fd4c50c..ff28af1 100644
--- a/sound/pci/cs46xx/cs46xx_lib.c
+++ b/sound/pci/cs46xx/cs46xx_lib.c
@@ -2400,8 +2400,7 @@ static void snd_cs46xx_codec_reset (ac97_t * ac97)
if ((err = snd_ac97_read(ac97, AC97_REC_GAIN)) == 0x8a05)
return;
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(HZ/100);
+ msleep(10);
} while (time_after_eq(end_time, jiffies));
snd_printk("CS46xx secondary codec dont respond!\n");
@@ -2435,8 +2434,7 @@ static int __devinit cs46xx_detect_codec(cs46xx_t *chip, int codec)
err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97[codec]);
return err;
}
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(HZ/100);
+ msleep(10);
}
snd_printdd("snd_cs46xx: codec %d detection timeout\n", codec);
return -ENXIO;
@@ -3018,8 +3016,7 @@ static int snd_cs46xx_chip_init(cs46xx_t *chip)
/*
* Wait until the PLL has stabilized.
*/
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(HZ/10); /* 100ms */
+ msleep(100);
/*
* Turn on clocking of the core so that we can setup the serial ports.
@@ -3072,8 +3069,7 @@ static int snd_cs46xx_chip_init(cs46xx_t *chip)
*/
if (snd_cs46xx_peekBA0(chip, BA0_ACSTS) & ACSTS_CRDY)
goto ok1;
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout((HZ+99)/100);
+ msleep(10);
}
@@ -3122,8 +3118,7 @@ static int snd_cs46xx_chip_init(cs46xx_t *chip)
*/
if ((snd_cs46xx_peekBA0(chip, BA0_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) == (ACISV_ISV3 | ACISV_ISV4))
goto ok2;
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout((HZ+99)/100);
+ msleep(10);
}
#ifndef CONFIG_SND_CS46XX_NEW_DSP
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