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authorRene Herman <rene.herman@gmail.com>2007-09-10 23:19:55 +0200
committerJaroslav Kysela <perex@perex.cz>2007-10-16 16:49:24 +0200
commit90cf9b853281a39555cce8a42fc0fabad75b42a8 (patch)
tree45b1da8f46b35d5b7d3fd1e6fbf05518670ff920 /sound/isa/ad1848
parent51c80cb65ff9b7bdf172f9075138793c2bce6883 (diff)
downloadop-kernel-dev-90cf9b853281a39555cce8a42fc0fabad75b42a8.zip
op-kernel-dev-90cf9b853281a39555cce8a42fc0fabad75b42a8.tar.gz
[ALSA] ad1838/cs4231 - fix MCE timeout upon initial load
When the ad1848/cs2431 is first being initialized, auto-calibration may not be set causing a timeout waiting for it in snd_ad1848/cs4231_mce_down(). This has no dire consequences other than an alarming printk, but since what we need to wait for is for the calibration to _finish_, let's just check for that instead. The early chips need a slight delay (as commented -- 5 sample periods) to be sure that _if_ calibration is going to happen, it has started when we check While the CS4231A datasheet implies it'll happen immediately on downing MCE, some testing is showing that there's a window there as well, so just do the delay everywhere. Thanks to Krysztof Helt for pinpointing this problem. Signed-off-by: Rene Herman <rene.herman@gmail.com> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jaroslav Kysela <perex@suse.cz>
Diffstat (limited to 'sound/isa/ad1848')
-rw-r--r--sound/isa/ad1848/ad1848_lib.c15
1 files changed, 7 insertions, 8 deletions
diff --git a/sound/isa/ad1848/ad1848_lib.c b/sound/isa/ad1848/ad1848_lib.c
index f01e564..d454d11 100644
--- a/sound/isa/ad1848/ad1848_lib.c
+++ b/sound/isa/ad1848/ad1848_lib.c
@@ -229,16 +229,15 @@ static void snd_ad1848_mce_down(struct snd_ad1848 *chip)
spin_unlock_irqrestore(&chip->reg_lock, flags);
return;
}
- /* calibration process */
- for (timeout = 500; timeout > 0 && (snd_ad1848_in(chip, AD1848_TEST_INIT) & AD1848_CALIB_IN_PROGRESS) == 0; timeout--);
- if ((snd_ad1848_in(chip, AD1848_TEST_INIT) & AD1848_CALIB_IN_PROGRESS) == 0) {
- snd_printd("mce_down - auto calibration time out (1)\n");
- spin_unlock_irqrestore(&chip->reg_lock, flags);
- return;
- }
+ /*
+ * Wait for (possible -- during init auto-calibration may not be set)
+ * calibration process to start. Needs upto 5 sample periods on AD1848
+ * which at the slowest possible rate of 5.5125 kHz means 907 us.
+ */
+ msleep(1);
#if 0
- printk("(2) timeout = %i, jiffies = %li\n", timeout, jiffies);
+ printk("(2) jiffies = %li\n", jiffies);
#endif
time = HZ / 4;
while (snd_ad1848_in(chip, AD1848_TEST_INIT) & AD1848_CALIB_IN_PROGRESS) {
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