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authorClemens Ladisch <clemens@ladisch.de>2012-01-08 22:18:00 +0100
committerClemens Ladisch <clemens@ladisch.de>2013-10-20 22:07:57 +0200
commit61b8cf0222b256b4f793d99c8bdc9b216d067a76 (patch)
tree5725c73801dde6ab4f2892b72f3d3d5338eb7d6d /sound/firewire
parentc614475b0ea9f7e6b3f76a46be315579bb899397 (diff)
downloadop-kernel-dev-61b8cf0222b256b4f793d99c8bdc9b216d067a76.zip
op-kernel-dev-61b8cf0222b256b4f793d99c8bdc9b216d067a76.tar.gz
ALSA: dice: document quadlet alignment
Doing accesses without quadlet alignment is a bad idea because the firmware's byte-swapping would garble the data; clarify this in the documentation. Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
Diffstat (limited to 'sound/firewire')
-rw-r--r--sound/firewire/dice-interface.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/sound/firewire/dice-interface.h b/sound/firewire/dice-interface.h
index af916b9..27b044f 100644
--- a/sound/firewire/dice-interface.h
+++ b/sound/firewire/dice-interface.h
@@ -7,9 +7,9 @@
/*
* Generally, all registers can be read like memory, i.e., with quadlet read or
- * block read transactions with any alignment or length. Writes are not
- * allowed except where noted; quadlet-sized registers must be written with
- * a quadlet write transaction.
+ * block read transactions with at least quadlet-aligned offset and length.
+ * Writes are not allowed except where noted; quadlet-sized registers must be
+ * written with a quadlet write transaction.
*
* All values are in big endian. The DICE firmware runs on a little-endian CPU
* and just byte-swaps _all_ quadlets on the bus, so values without endianness
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