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| author | Hans de Goede <hdegoede@redhat.com> | 2015-03-08 22:13:57 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2015-03-18 10:56:46 +0100 |
| commit | ef6d24cc7f5b2b5c4184eddb039e2add6231a122 (patch) | |
| tree | e32481835c8e61ef2dc01c7e1ea797c9c8206c00 /scripts | |
| parent | bd8733738c5af6114dd15d340b3f8713e9b624c2 (diff) | |
| download | op-kernel-dev-ef6d24cc7f5b2b5c4184eddb039e2add6231a122.zip op-kernel-dev-ef6d24cc7f5b2b5c4184eddb039e2add6231a122.tar.gz | |
pinctrl: sun4i: GPIOs configured as irq must be set to input before reading
On sun4i-a10, when GPIOs are configured as external interrupt the value for
them in the data register does not seem to get updated, so set their mux to
input (and restore afterwards) when reading the pin.
Missed edges seem to be buffered, so this does not introduce a race
condition.
I've also tested this on sun5i-a13 and sun7i-a20 and those do not seem to
be affected, the input value representation in the data register does seem
to correctly get updated to the actual pin value while in irq mode there.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions
