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| author | Bjorn Helgaas <bhelgaas@google.com> | 2013-11-27 17:24:50 -0700 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2013-12-13 08:44:30 -0700 |
| commit | 5b764b834ea925b7fc87df4a87a0fde95acbecb9 (patch) | |
| tree | bc373ac83ea818d5c3a208a267400f6f5a4b15b8 /scripts | |
| parent | d2f54d9b3ee32bc006a7ff25d716b32feba4b522 (diff) | |
| download | op-kernel-dev-5b764b834ea925b7fc87df4a87a0fde95acbecb9.zip op-kernel-dev-5b764b834ea925b7fc87df4a87a0fde95acbecb9.tar.gz | |
PCI: Stop clearing bridge Secondary Status when setting up I/O aperture
pci_setup_bridge_io() accessed PCI_IO_BASE and PCI_IO_LIMIT using dword
(32-bit) reads and writes, which also access the Secondary Status register.
Since the Secondary Status register is in the upper 16 bits of the dword,
and we preserved those upper 16 bits, this had the effect of clearing any
of the write-1-to-clear bits that happened to be set in the Secondary
Status register.
That's not what we want, so use word (16-bit) accesses to update only
PCI_IO_BASE and PCI_IO_LIMIT.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions
