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author | Lv Zheng <lv.zheng@intel.com> | 2013-03-08 09:20:32 +0000 |
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committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2013-03-12 00:45:03 +0100 |
commit | 25c0330aa6bba60e36ac460d12ef954332852426 (patch) | |
tree | 4b31084daf21319b19887fa930fa431694af1118 /scripts/gcc-x86_64-has-stack-protector.sh | |
parent | 8c2809144a372284f757bd4d70b08206e20681b7 (diff) | |
download | op-kernel-dev-25c0330aa6bba60e36ac460d12ef954332852426.zip op-kernel-dev-25c0330aa6bba60e36ac460d12ef954332852426.tar.gz |
ACPICA: iASL/Disassembler: Add support for VRTC table
VRTC is used in Intel MID platforms as a replacement of the
traditional x86 RTC. VRTC table can be found in the recent ACPI
BIOS enabled Intel MID platforms. The format of this table has
been defined in the "Simple Firmware Interface Specification"
except it uses GAS instead of 64-bit values for address fields.
This patch introduces VRTC table support into ACPICA. Lv Zheng.
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'scripts/gcc-x86_64-has-stack-protector.sh')
0 files changed, 0 insertions, 0 deletions