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| author | Chen-Yu Tsai <wens@csie.org> | 2014-02-10 18:35:47 +0800 |
|---|---|---|
| committer | Emilio López <emilio@elopez.com.ar> | 2014-02-18 10:34:28 -0300 |
| commit | e4c6d6c11bee5ff11feb837a0a76103b3eba252f (patch) | |
| tree | de46fbc31e9fa56f85dcf2182a44d383fc7176da /samples | |
| parent | 92ef67c53ad92487c3c8de75e7940384c2edd793 (diff) | |
| download | op-kernel-dev-e4c6d6c11bee5ff11feb837a0a76103b3eba252f.zip op-kernel-dev-e4c6d6c11bee5ff11feb837a0a76103b3eba252f.tar.gz | |
clk: sunxi: Add Allwinner A20/A31 GMAC clock unit
The Allwinner A20/A31 clock module controls the transmit clock source
and interface type of the GMAC ethernet controller. Model this as
a single clock for GMAC drivers to use.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Diffstat (limited to 'samples')
0 files changed, 0 insertions, 0 deletions
