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| author | Alex Deucher <alexdeucher@gmail.com> | 2011-01-06 21:19:26 -0500 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2011-01-07 14:11:34 +1000 |
| commit | 9ace9f7b168fef492f731ba60da5c76bc0776e6d (patch) | |
| tree | 7cc2fa7be499117334a40eeb1ead7929f1728825 /samples | |
| parent | 03f40090555bd3de9fc80aa4e805ac7fa9c39dfe (diff) | |
| download | op-kernel-dev-9ace9f7b168fef492f731ba60da5c76bc0776e6d.zip op-kernel-dev-9ace9f7b168fef492f731ba60da5c76bc0776e6d.tar.gz | |
drm/radeon/kms: adjust default clock/vddc tracking for pm on DCE5
NI chips no longer load the MC ucode in the asic_init sequence so
the asic comes up in a basic mode with low engine/memory clocks and
a voltage. Once the MC ucode is loaded by the driver the card
can be programmed to it's proper default clocks and voltage. As such
the default clocks in the firmware info table as the post clocks, not
the default running clocks. Track the default post clocks and default
running clocks separately to handle this.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'samples')
0 files changed, 0 insertions, 0 deletions
