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authorSinan Kaya <okaya@codeaurora.org>2018-04-02 13:48:00 -0400
committerMatt Turner <mattst88@gmail.com>2018-04-07 15:04:15 -0700
commitcd0e00c106722eca40b38ebf11cf134c01901086 (patch)
tree3cc22abf68b50fb7e220d1554b48a0ebf50804e3 /samples
parent6fd16ce5590e30d0ed8b21e977102361ff9f92ef (diff)
downloadop-kernel-dev-cd0e00c106722eca40b38ebf11cf134c01901086.zip
op-kernel-dev-cd0e00c106722eca40b38ebf11cf134c01901086.tar.gz
alpha: io: reorder barriers to guarantee writeX() and iowriteX() ordering
memory-barriers.txt has been updated with the following requirement. "When using writel(), a prior wmb() is not needed to guarantee that the cache coherent memory writes have completed before writing to the MMIO region." Current writeX() and iowriteX() implementations on alpha are not satisfying this requirement as the barrier is after the register write. Move mb() in writeX() and iowriteX() functions to guarantee that HW observes memory changes before performing register operations. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Matt Turner <mattst88@gmail.com>
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