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authorAndrew Lunn <andrew@lunn.ch>2015-08-31 15:56:50 +0200
committerDavid S. Miller <davem@davemloft.net>2015-08-31 14:48:02 -0700
commite44853466844c20d8b5b16de187f63ddc50710dd (patch)
tree1266f92e283bb7d5300504cc3f764c2cb8d06e89 /net
parent39b0c705195e9409dc8a40cc82b11d81405a4a4b (diff)
downloadop-kernel-dev-e44853466844c20d8b5b16de187f63ddc50710dd.zip
op-kernel-dev-e44853466844c20d8b5b16de187f63ddc50710dd.tar.gz
net: dsa: Allow DSA and CPU ports to have a phy-mode property
It can be useful for DSA and CPU ports to have a phy-mode property, in particular to specify RGMII delays. Parse the property and set it in the fixed-link phydev. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net')
-rw-r--r--net/dsa/dsa.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/net/dsa/dsa.c b/net/dsa/dsa.c
index afff173..76e380076 100644
--- a/net/dsa/dsa.c
+++ b/net/dsa/dsa.c
@@ -181,7 +181,7 @@ static int dsa_cpu_dsa_setup(struct dsa_switch *ds, struct net_device *master)
struct dsa_chip_data *cd = ds->pd;
struct device_node *port_dn;
struct phy_device *phydev;
- int ret, port;
+ int ret, port, mode;
for (port = 0; port < DSA_MAX_PORTS; port++) {
if (!(dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port)))
@@ -196,6 +196,12 @@ static int dsa_cpu_dsa_setup(struct dsa_switch *ds, struct net_device *master)
return ret;
}
phydev = of_phy_find_device(port_dn);
+
+ mode = of_get_phy_mode(port_dn);
+ if (mode < 0)
+ mode = PHY_INTERFACE_MODE_NA;
+ phydev->interface = mode;
+
genphy_config_init(phydev);
genphy_read_status(phydev);
if (ds->drv->adjust_link)
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