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authorBen Skeggs <bskeggs@redhat.com>2013-01-31 13:51:20 +1000
committerBen Skeggs <bskeggs@redhat.com>2013-02-20 16:00:46 +1000
commit9bd2ddbaa241274cd11191838d080fc308ecf6c7 (patch)
tree0e8ba52fb2034de4f3fcd977589e3a9bdad79b26 /net/9p
parent1d7c71a3e2f77336df536855b0efd2dc5bdeb41b (diff)
downloadop-kernel-dev-9bd2ddbaa241274cd11191838d080fc308ecf6c7.zip
op-kernel-dev-9bd2ddbaa241274cd11191838d080fc308ecf6c7.tar.gz
drm/nouveau/fifo/nvc0-: use interrupt 31 as an event trigger
Generated if you try and use fifo method 0x20 on any subchannel, appears that it can be safely masked off without stalling the whole GPU. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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