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author | Suzuki K Poulose <suzuki.poulose@arm.com> | 2016-09-09 14:07:10 +0100 |
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committer | Will Deacon <will.deacon@arm.com> | 2016-09-09 15:03:28 +0100 |
commit | c47a1900ad710fd2c97127e2ba19da1df79cf733 (patch) | |
tree | 280ee1f75639c56aca3f82abd3065f94b740c68f /mm | |
parent | 89ba26458b72422e0a1d85eb729a15220b204458 (diff) | |
download | op-kernel-dev-c47a1900ad710fd2c97127e2ba19da1df79cf733.zip op-kernel-dev-c47a1900ad710fd2c97127e2ba19da1df79cf733.tar.gz |
arm64: Rearrange CPU errata workaround checks
Right now we run through the work around checks on a CPU
from __cpuinfo_store_cpu. There are some problems with that:
1) We initialise the system wide CPU feature registers only after the
Boot CPU updates its cpuinfo. Now, if a work around depends on the
variance of a CPU ID feature (e.g, check for Cache Line size mismatch),
we have no way of performing it cleanly for the boot CPU.
2) It is out of place, invoked from __cpuinfo_store_cpu() in cpuinfo.c. It
is not an obvious place for that.
This patch rearranges the CPU specific capability(aka work around) checks.
1) At the moment we use verify_local_cpu_capabilities() to check if a new
CPU has all the system advertised features. Use this for the secondary CPUs
to perform the work around check. For that we rename
verify_local_cpu_capabilities() => check_local_cpu_capabilities()
which:
If the system wide capabilities haven't been initialised (i.e, the CPU
is activated at the boot), update the system wide detected work arounds.
Otherwise (i.e a CPU hotplugged in later) verify that this CPU conforms to the
system wide capabilities.
2) Boot CPU updates the work arounds from smp_prepare_boot_cpu() after we have
initialised the system wide CPU feature values.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'mm')
0 files changed, 0 insertions, 0 deletions