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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-04-21 23:21:34 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-04-21 23:21:34 -0700 |
| commit | db4fd9c5d072a20ea6b7e40276a9822e04732610 (patch) | |
| tree | af8e0845d9a21c568b34d34195858c1f462b53e6 /lib | |
| parent | 8aaa51b63cc3c5f3b2e72d2f0e193d9c2e00fe46 (diff) | |
| parent | 0edfad5959df7379c9e554fbe8ba264ae232d321 (diff) | |
| download | op-kernel-dev-db4fd9c5d072a20ea6b7e40276a9822e04732610.zip op-kernel-dev-db4fd9c5d072a20ea6b7e40276a9822e04732610.tar.gz | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
Pull sparc fixes from David Miller:
1) ldc_alloc_exp_dring() can be called from softints, so use
GFP_ATOMIC. From Sowmini Varadhan.
2) Some minor warning/build fixups for the new iommu-common code on
certain archs and with certain debug options enabled. Also from
Sowmini Varadhan.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
sparc: Use GFP_ATOMIC in ldc_alloc_exp_dring() as it can be called in softirq context
sparc64: Use M7 PMC write on all chips T4 and onward.
iommu-common: rename iommu_pool_hash to iommu_hash_common
iommu-common: fix x86_64 compiler warnings
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/iommu-common.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/lib/iommu-common.c b/lib/iommu-common.c index a1a517c..df30632 100644 --- a/lib/iommu-common.c +++ b/lib/iommu-common.c @@ -15,9 +15,9 @@ #define DMA_ERROR_CODE (~(dma_addr_t)0x0) #endif -unsigned long iommu_large_alloc = 15; +static unsigned long iommu_large_alloc = 15; -static DEFINE_PER_CPU(unsigned int, iommu_pool_hash); +static DEFINE_PER_CPU(unsigned int, iommu_hash_common); static inline bool need_flush(struct iommu_map_table *iommu) { @@ -44,7 +44,7 @@ static void setup_iommu_pool_hash(void) return; do_once = true; for_each_possible_cpu(i) - per_cpu(iommu_pool_hash, i) = hash_32(i, IOMMU_POOL_HASHBITS); + per_cpu(iommu_hash_common, i) = hash_32(i, IOMMU_POOL_HASHBITS); } /* @@ -53,12 +53,12 @@ static void setup_iommu_pool_hash(void) * the top 1/4 of the table will be set aside for pool allocations * of more than iommu_large_alloc pages. */ -extern void iommu_tbl_pool_init(struct iommu_map_table *iommu, - unsigned long num_entries, - u32 table_shift, - void (*lazy_flush)(struct iommu_map_table *), - bool large_pool, u32 npools, - bool skip_span_boundary_check) +void iommu_tbl_pool_init(struct iommu_map_table *iommu, + unsigned long num_entries, + u32 table_shift, + void (*lazy_flush)(struct iommu_map_table *), + bool large_pool, u32 npools, + bool skip_span_boundary_check) { unsigned int start, i; struct iommu_pool *p = &(iommu->large_pool); @@ -106,7 +106,7 @@ unsigned long iommu_tbl_range_alloc(struct device *dev, unsigned long mask, unsigned int align_order) { - unsigned int pool_hash = __this_cpu_read(iommu_pool_hash); + unsigned int pool_hash = __this_cpu_read(iommu_hash_common); unsigned long n, end, start, limit, boundary_size; struct iommu_pool *pool; int pass = 0; |
