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author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2009-09-22 08:47:11 -0700 |
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committer | Liam Girdwood <lrg@slimlogic.co.uk> | 2009-12-17 10:27:22 +0000 |
commit | e24a04c44cf312e88b50006a91ad7ffc1c0d97a5 (patch) | |
tree | a8f4b9c2f5caaed9646a1118b8d9cd84de134439 /lib/nlattr.c | |
parent | 27f37e4bfed803be338dcc78845d4a67eefb40a0 (diff) | |
download | op-kernel-dev-e24a04c44cf312e88b50006a91ad7ffc1c0d97a5.zip op-kernel-dev-e24a04c44cf312e88b50006a91ad7ffc1c0d97a5.tar.gz |
regulator: Implement WM831x BuckWise DC-DC convertor DVS support
The BuckWise DC-DC convertors in WM831x devices support switching to
a second output voltage using the logic level on one of the device
pins. This is intended to allow rapid voltage switching for uses like
cpufreq, replacing the I2C or SPI write used to configure the voltage
of the regulator with a much faster GPIO status change.
This is implemented by keeping the DVS voltage configured as the
maximum voltage permitted for the regulator. If a request is made
for the maximum voltage then the GPIO is used to switch to the DVS
voltage, otherwise the normal ON voltage is updated and used. This
follows the idiom used by most cpufreq drivers, which drop the
minimum voltage as the core frequency is dropped but use a constant
maximum - raising the voltage should normally be fast, but lowering
it may be slower.
Configuration of the DVS MFP on the device should be done externally,
for example via OTP.
Support is present in the hardware for monitoring the status of the
transition using a second GPIO. This is not currently implemented
but platform data is provided for it - the driver currently assumes
that the device will be configured to transition immediately - but
platform data is provided to reduce merge issues once it is.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
Diffstat (limited to 'lib/nlattr.c')
0 files changed, 0 insertions, 0 deletions