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author | Philipp Zabel <philipp.zabel@gmail.com> | 2009-04-17 11:47:57 +0200 |
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committer | Eric Miao <eric.y.miao@gmail.com> | 2009-06-05 10:32:20 +0800 |
commit | a01bd58449088b63da45ab5f2c7921893eb7d143 (patch) | |
tree | 4d8797d90d4a2b25c111d9677d0665f6bfe47db6 /kernel | |
parent | 46580c03062da8c047238a6b3d2b2b13af1700b5 (diff) | |
download | op-kernel-dev-a01bd58449088b63da45ab5f2c7921893eb7d143.zip op-kernel-dev-a01bd58449088b63da45ab5f2c7921893eb7d143.tar.gz |
[ARM] pxa: allow IRQ_BOARD_END to be customized and make zylonite to use it
The default value is 16 IRQs. Zylonite needs 32, ASIC3 based boards need 70.
My problem is still that due to the way IRQ_GPIO is hardcoded, ASIC3 based boards
need 70 IRQs starting at IRQ_BOARD_START. If I define ASIC3 IRQs similar to LoCoMo
or SA1111, things break as soon as something selects PXA_HAVE_BOARD_IRQS.
Increasing the default number of board IRQs to 70 instead doesn't seem very nice.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Diffstat (limited to 'kernel')
0 files changed, 0 insertions, 0 deletions