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author | David S. Miller <davem@davemloft.net> | 2012-08-22 14:21:38 -0700 |
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committer | David S. Miller <davem@davemloft.net> | 2012-08-22 14:21:38 -0700 |
commit | 1304a7343b30fc4f16045412efdbb4179a3d9255 (patch) | |
tree | 83d667ac4f62e30f70305ce4cc7e030e3465f92e /kernel/irq | |
parent | 1d76efe1577b4323609b1bcbfafa8b731eda071a (diff) | |
parent | 23dcfa61bac244e1200ff9ad19c6e9144dcb6bb5 (diff) | |
download | op-kernel-dev-1304a7343b30fc4f16045412efdbb4179a3d9255.zip op-kernel-dev-1304a7343b30fc4f16045412efdbb4179a3d9255.tar.gz |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Diffstat (limited to 'kernel/irq')
-rw-r--r-- | kernel/irq/manage.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c index 0a8e8f0..4c69326 100644 --- a/kernel/irq/manage.c +++ b/kernel/irq/manage.c @@ -944,6 +944,18 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new) } /* + * Drivers are often written to work w/o knowledge about the + * underlying irq chip implementation, so a request for a + * threaded irq without a primary hard irq context handler + * requires the ONESHOT flag to be set. Some irq chips like + * MSI based interrupts are per se one shot safe. Check the + * chip flags, so we can avoid the unmask dance at the end of + * the threaded handler for those. + */ + if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE) + new->flags &= ~IRQF_ONESHOT; + + /* * The following block of code has to be executed atomically */ raw_spin_lock_irqsave(&desc->lock, flags); @@ -1017,7 +1029,8 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new) */ new->thread_mask = 1 << ffz(thread_mask); - } else if (new->handler == irq_default_primary_handler) { + } else if (new->handler == irq_default_primary_handler && + !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) { /* * The interrupt was requested with handler = NULL, so * we use the default primary handler for it. But it |