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authorThomas Gleixner <tglx@linutronix.de>2013-05-06 14:30:24 +0000
committerThomas Gleixner <tglx@linutronix.de>2013-05-29 10:57:10 +0200
commitd0051816e619f8f082582bec07ffa51bdb4f2104 (patch)
tree5ae8874599ad25d7ac35847f7a25c44a70e2a5b7 /kernel/irq
parent966dc736b819999cd2d3a6408d47d33b579f7d56 (diff)
downloadop-kernel-dev-d0051816e619f8f082582bec07ffa51bdb4f2104.zip
op-kernel-dev-d0051816e619f8f082582bec07ffa51bdb4f2104.tar.gz
genirq: irqchip: Add a mask calculation function
Some chips have weird bit mask access patterns instead of the linear you expect. Allow them to calculate the cached mask themself. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Russell King - ARM Linux <linux@arm.linux.org.uk> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Jean-Francois Moine <moinejf@free.fr> Cc: devicetree-discuss@lists.ozlabs.org Cc: Rob Herring <rob.herring@calxeda.com> Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Cc: Gregory Clement <gregory.clement@free-electrons.com> Cc: Gerlando Falauto <gerlando.falauto@keymile.com> Cc: Rob Landley <rob@landley.net> Acked-by: Grant Likely <grant.likely@linaro.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: http://lkml.kernel.org/r/20130506142539.302898834@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'kernel/irq')
-rw-r--r--kernel/irq/generic-chip.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c
index 957155c..5068fe3 100644
--- a/kernel/irq/generic-chip.c
+++ b/kernel/irq/generic-chip.c
@@ -240,6 +240,7 @@ void irq_setup_generic_chip(struct irq_chip_generic *gc, u32 msk,
unsigned int set)
{
struct irq_chip_type *ct = gc->chip_types;
+ struct irq_chip *chip = &ct->chip;
unsigned int i;
u32 *mskptr = &gc->mask_cache, mskreg = ct->regs.mask;
@@ -267,9 +268,12 @@ void irq_setup_generic_chip(struct irq_chip_generic *gc, u32 msk,
if (!(flags & IRQ_GC_NO_MASK)) {
struct irq_data *d = irq_get_irq_data(i);
- d->mask = 1 << (i - gc->irq_base);
+ if (chip->irq_calc_mask)
+ chip->irq_calc_mask(d);
+ else
+ d->mask = 1 << (i - gc->irq_base);
}
- irq_set_chip_and_handler(i, &ct->chip, ct->handler);
+ irq_set_chip_and_handler(i, chip, ct->handler);
irq_set_chip_data(i, gc);
irq_modify_status(i, clr, set);
}
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