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authorGerlando Falauto <gerlando.falauto@keymile.com>2013-05-06 14:30:21 +0000
committerThomas Gleixner <tglx@linutronix.de>2013-05-29 10:57:10 +0200
commitaf80b0fed67261dcba2ce2406db1d553d07cbe75 (patch)
tree002d93bdc9e20eb11602e6ed3792e743f5a8e869 /kernel/irq
parent899f0e66fff36ebb6dd6a83af9aa631f6cb7e0dc (diff)
downloadop-kernel-dev-af80b0fed67261dcba2ce2406db1d553d07cbe75.zip
op-kernel-dev-af80b0fed67261dcba2ce2406db1d553d07cbe75.tar.gz
genirq: Generic chip: Handle separate mask registers
There are cases where all irq_chip_type instances have separate mask registers, making a shared mask register cache unsuitable for the purpose. Introduce a new flag IRQ_GC_MASK_CACHE_PER_TYPE. If set, point the per chip mask pointer to the per chip private mask cache instead. [ tglx: Simplified code, renamed flag and massaged changelog ] Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Joey Oravec <joravec@drewtech.com> Cc: Lennert Buytenhek <kernel@wantstofly.org> Cc: Russell King - ARM Linux <linux@arm.linux.org.uk> Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Cc: Holger Brunck <Holger.Brunck@keymile.com> Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Grant Likely <grant.likely@linaro.org> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Arnd Bergmann <arnd@arndb.de> Cc: devicetree-discuss@lists.ozlabs.org Cc: Rob Herring <rob.herring@calxeda.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Gregory Clement <gregory.clement@free-electrons.com> Cc: Simon Guinot <simon@sequanux.org> Cc: linux-arm-kernel@lists.infradead.org Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jean-Francois Moine <moinejf@free.fr> Cc: Nicolas Pitre <nico@fluxnic.net> Cc: Rob Landley <rob@landley.net> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Link: http://lkml.kernel.org/r/20130506142539.152569748@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'kernel/irq')
-rw-r--r--kernel/irq/generic-chip.c17
1 files changed, 10 insertions, 7 deletions
diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c
index 113d9eb..da2a941 100644
--- a/kernel/irq/generic-chip.c
+++ b/kernel/irq/generic-chip.c
@@ -241,18 +241,21 @@ void irq_setup_generic_chip(struct irq_chip_generic *gc, u32 msk,
{
struct irq_chip_type *ct = gc->chip_types;
unsigned int i;
+ u32 *mskptr = &gc->mask_cache, mskreg = ct->regs.mask;
raw_spin_lock(&gc_lock);
list_add_tail(&gc->list, &gc_list);
raw_spin_unlock(&gc_lock);
- /* Init mask cache ? */
- if (flags & IRQ_GC_INIT_MASK_CACHE)
- gc->mask_cache = irq_reg_readl(gc->reg_base + ct->regs.mask);
-
- /* Initialize mask cache pointer */
- for (i = 0; i < gc->num_ct; i++)
- ct[i].mask_cache = &gc->mask_cache;
+ for (i = 0; i < gc->num_ct; i++) {
+ if (flags & IRQ_GC_MASK_CACHE_PER_TYPE) {
+ mskptr = &ct[i].mask_cache_priv;
+ mskreg = ct[i].regs.mask;
+ }
+ ct[i].mask_cache = mskptr;
+ if (flags & IRQ_GC_INIT_MASK_CACHE)
+ *mskptr = irq_reg_readl(gc->reg_base + mskreg);
+ }
for (i = gc->irq_base; msk; msk >>= 1, i++) {
if (!(msk & 0x01))
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