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authorGreg Ungerer <gerg@snapgear.com>2005-11-02 15:03:09 +1000
committerLinus Torvalds <torvalds@g5.osdl.org>2005-11-01 21:41:20 -0800
commit4f4ef2967e1e8dce43e9cf7186aeb60a8c33aaf4 (patch)
treeb2a55bdaf01217adeb7fe1f1a8b65f3eae8c3eb8 /include
parent7354b62cf799d91e69e38603a139a79df48b23d9 (diff)
downloadop-kernel-dev-4f4ef2967e1e8dce43e9cf7186aeb60a8c33aaf4.zip
op-kernel-dev-4f4ef2967e1e8dce43e9cf7186aeb60a8c33aaf4.tar.gz
[PATCH] m68knommu: add 5208 ColdFire cache support
Add support for the cpu cache of the 5208 ColdFire fmaily. Patch originally from Matt Wadell (from code originally written by Mike Lavender). Signed-off-by: Greg Ungerer <gerg@uclinux.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-m68knommu/mcfcache.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/include/asm-m68knommu/mcfcache.h b/include/asm-m68knommu/mcfcache.h
index b17cd92..9cb4014 100644
--- a/include/asm-m68knommu/mcfcache.h
+++ b/include/asm-m68knommu/mcfcache.h
@@ -117,6 +117,20 @@
.endm
#endif /* CONFIG_M5407 */
+#if defined(CONFIG_M520x)
+.macro CACHE_ENABLE
+ move.l #0x01000000,%d0 /* invalidate whole cache */
+ movec %d0,%CACR
+ nop
+ move.l #0x0000c000,%d0 /* set SDRAM cached (write-thru) */
+ movec %d0,%ACR0
+ move.l #0x00000000,%d0 /* no other regions cached */
+ movec %d0,%ACR1
+ move.l #0x80400000,%d0 /* enable 8K instruction cache */
+ movec %d0,%CACR
+ nop
+.endm
+#endif /* CONFIG_M520x */
/****************************************************************************/
#endif /* __M68KNOMMU_MCFCACHE_H */
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