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authorLinus Torvalds <torvalds@linux-foundation.org>2009-02-25 09:49:30 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2009-02-25 09:49:30 -0800
commitc15d8a6499d04e5d2cac07f8120f207bb275f60f (patch)
tree4cde78329a06fdf07e3d780881481d9ae1d021fb /include
parent490213556ad5bc1b46857bce1bc2c6db41d3e63d (diff)
parente08fb4f6d1dc95eff5b3fc1d0412bcb5afcae7f2 (diff)
downloadop-kernel-dev-c15d8a6499d04e5d2cac07f8120f207bb275f60f.zip
op-kernel-dev-c15d8a6499d04e5d2cac07f8120f207bb275f60f.tar.gz
Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: drm/i915: convert DRM_ERROR to DRM_DEBUG in phys object pwrite path drm/i915: make hw page ioremap use ioremap_wc drm: edid revision 0 is valid drm: Correct unbalanced drm_vblank_put() during mode setting. drm: disable encoders before re-routing them drm: Fix ordering of bit fields in EDID structure leading huge vsync values. drm: Fix shifts of EDID vsync offset/width fields. drm/i915: handle bogus VBT panel timing drm/i915: remove PLL debugging messages
Diffstat (limited to 'include')
-rw-r--r--include/drm/drm_crtc_helper.h1
-rw-r--r--include/drm/drm_edid.h4
2 files changed, 3 insertions, 2 deletions
diff --git a/include/drm/drm_crtc_helper.h b/include/drm/drm_crtc_helper.h
index 0b0d236..c7d4b2e 100644
--- a/include/drm/drm_crtc_helper.h
+++ b/include/drm/drm_crtc_helper.h
@@ -76,6 +76,7 @@ struct drm_encoder_helper_funcs {
void (*mode_set)(struct drm_encoder *encoder,
struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode);
+ struct drm_crtc *(*get_crtc)(struct drm_encoder *encoder);
/* detect for DAC style encoders */
enum drm_connector_status (*detect)(struct drm_encoder *encoder,
struct drm_connector *connector);
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index c707c15..ff8d27a 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -58,10 +58,10 @@ struct detailed_pixel_timing {
u8 hsync_pulse_width_lo;
u8 vsync_pulse_width_lo:4;
u8 vsync_offset_lo:4;
- u8 hsync_pulse_width_hi:2;
- u8 hsync_offset_hi:2;
u8 vsync_pulse_width_hi:2;
u8 vsync_offset_hi:2;
+ u8 hsync_pulse_width_hi:2;
+ u8 hsync_offset_hi:2;
u8 width_mm_lo;
u8 height_mm_lo;
u8 height_mm_hi:4;
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