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authorJeff Dike <jdike@addtoit.com>2008-02-04 22:31:06 -0800
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2008-02-05 09:44:29 -0800
commit909e90d3c410b684e564729145f7c20dad887757 (patch)
tree31c4e5ade894f185a7eeb04ce7023cb7da6b9277 /include
parent1adfd6095e1c654dce5a692db5aa5a2b2a8d6b0d (diff)
downloadop-kernel-dev-909e90d3c410b684e564729145f7c20dad887757.zip
op-kernel-dev-909e90d3c410b684e564729145f7c20dad887757.tar.gz
uml: 64-bit tlb fixes
Some 64-bit tlb fixes - moved pmd_page_vaddr to pgtable.h since it's the same for both 2-level and 3-level page tables fixed a bogus cast on pud_page_vaddr made the address checking in update_*_range more careful Signed-off-by: Jeff Dike <jdike@linux.intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-um/pgtable-2level.h3
-rw-r--r--include/asm-um/pgtable-3level.h3
-rw-r--r--include/asm-um/pgtable.h3
3 files changed, 4 insertions, 5 deletions
diff --git a/include/asm-um/pgtable-2level.h b/include/asm-um/pgtable-2level.h
index 172a75f..f534b73 100644
--- a/include/asm-um/pgtable-2level.h
+++ b/include/asm-um/pgtable-2level.h
@@ -41,9 +41,6 @@ static inline void pgd_mkuptodate(pgd_t pgd) { }
#define pfn_pte(pfn, prot) __pte(pfn_to_phys(pfn) | pgprot_val(prot))
#define pfn_pmd(pfn, prot) __pmd(pfn_to_phys(pfn) | pgprot_val(prot))
-#define pmd_page_vaddr(pmd) \
- ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
-
/*
* Bits 0 through 4 are taken
*/
diff --git a/include/asm-um/pgtable-3level.h b/include/asm-um/pgtable-3level.h
index 48f8f5d..0446f45 100644
--- a/include/asm-um/pgtable-3level.h
+++ b/include/asm-um/pgtable-3level.h
@@ -87,8 +87,7 @@ static inline void pud_clear (pud_t *pud)
}
#define pud_page(pud) phys_to_page(pud_val(pud) & PAGE_MASK)
-#define pud_page_vaddr(pud) \
- ((struct page *) __va(pud_val(pud) & PAGE_MASK))
+#define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PAGE_MASK))
/* Find an entry in the second-level page table.. */
#define pmd_offset(pud, address) ((pmd_t *) pud_page_vaddr(*(pud)) + \
diff --git a/include/asm-um/pgtable.h b/include/asm-um/pgtable.h
index fb47777..4102b44 100644
--- a/include/asm-um/pgtable.h
+++ b/include/asm-um/pgtable.h
@@ -308,6 +308,9 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
+#define pmd_page_vaddr(pmd) \
+ ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
+
/*
* the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
*
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