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authorArtem Bityutskiy <artem.bityutskiy@linux.intel.com>2013-03-13 13:45:00 +0200
committerDavid Woodhouse <David.Woodhouse@intel.com>2013-04-05 13:15:00 +0100
commitecb42fea59cf2d1e7160c5c7e707120e0e6714db (patch)
tree0692bedc13568083615385f997a41342de879190 /include
parent97135118bd6a5fb86a7e3a28a50de10b97192ced (diff)
downloadop-kernel-dev-ecb42fea59cf2d1e7160c5c7e707120e0e6714db.zip
op-kernel-dev-ecb42fea59cf2d1e7160c5c7e707120e0e6714db.tar.gz
mtd: nand: use more reasonable integer types
Use 'unsigned int' instead of 'unsigned long' in the NAND chip description data structure, because 32-bits is more than enough for our purposes. We do not need 64-bits, which is what we end up on 64-bit architectures. We declare many instances of this data structure, so this should help saving some amount of memory. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mtd/nand.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 9a1b74c..d5903c0 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -582,8 +582,8 @@ struct nand_chip {
* @pagesize: size of the NAND page in bytes; if 0, then the real page size (as
* well as the eraseblock size) is determined from the extended NAND
* chip ID array)
- * @erasesize: eraseblock size in bytes (determined from the extended ID if 0)
* @chipsize: total chip size in MiB
+ * @erasesize: eraseblock size in bytes (determined from the extended ID if 0)
* @options: stores various chip bit options
*/
struct nand_flash_dev {
@@ -595,10 +595,10 @@ struct nand_flash_dev {
};
uint8_t id[8];
};
- unsigned long pagesize;
- unsigned long chipsize;
- unsigned long erasesize;
- unsigned long options;
+ unsigned int pagesize;
+ unsigned int chipsize;
+ unsigned int erasesize;
+ unsigned int options;
};
/**
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