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author | Ralf Baechle <ralf@linux-mips.org> | 2005-07-12 18:35:38 +0000 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 19:31:46 +0100 |
commit | cc61c1fede7d02cb8133ab0952ca3f3ba1f7fbb1 (patch) | |
tree | 9ad2708ba9ce5038dd6df888d1fc69de055c35fd /include | |
parent | bbc7f22f6dca8a075b565ade49e9a982f89707c3 (diff) | |
download | op-kernel-dev-cc61c1fede7d02cb8133ab0952ca3f3ba1f7fbb1.zip op-kernel-dev-cc61c1fede7d02cb8133ab0952ca3f3ba1f7fbb1.tar.gz |
MIPS R2 instruction hazard handling.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-mips/hazards.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h index 181f08de..f63d824 100644 --- a/include/asm-mips/hazards.h +++ b/include/asm-mips/hazards.h @@ -228,6 +228,22 @@ __asm__( #endif +#if defined(CONFIG_CPU_MIPS32_R2) || defined (CONFIG_CPU_MIPS64_R2) +#define instruction_hazard() \ +do { \ +__label__ __next; \ + __asm__ __volatile__( \ + " jr.hb %0 \n" \ + : \ + : "r" (&&__next)); \ +__next: \ + ; \ +} while (0) + +#else +#define instruction_hazard() do { } while (0) +#endif + #endif /* __ASSEMBLY__ */ #endif /* _ASM_HAZARDS_H */ |