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authorSneha Narnakaje <nsnehaprabha@ti.com>2009-09-18 12:51:47 -0700
committerDavid Woodhouse <David.Woodhouse@intel.com>2009-09-19 11:14:54 -0700
commit6e0cb135b3f3713b95ea41a11155e83a8c70f5f8 (patch)
tree06e685a6d4863139a8bf68a0791c107aa7969765 /include
parent46a8cf2df2232c0051f29716ff8a166ebeb08daf (diff)
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op-kernel-dev-6e0cb135b3f3713b95ea41a11155e83a8c70f5f8.tar.gz
mtd: nand: add new ECC mode - ECC_HW_OOB_FIRST
This patch adds the new mode NAND_ECC_HW_OOB_FIRST in the nand code to support 4-bit ECC on TI DaVinci devices with large page (up to 2KiB) NAND chips. This ECC mode is similar to NAND_ECC_HW, with the exception of read_page API that first reads the OOB area, reads the data in chunks, feeds the ECC from OOB area to the ECC hw engine and perform any correction on the data as per the ECC status reported by the engine. "ECC_HW_OOB_FIRST" name suggested by Thomas Gleixner Reviewed-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Sneha Narnakaje <nsnehaprabha@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mtd/nand.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 686f370..7a232a9 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -121,6 +121,7 @@ typedef enum {
NAND_ECC_SOFT,
NAND_ECC_HW,
NAND_ECC_HW_SYNDROME,
+ NAND_ECC_HW_OOB_FIRST,
} nand_ecc_modes_t;
/*
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