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author | Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 2006-07-13 17:33:24 +0900 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2006-07-13 21:26:20 +0100 |
commit | f26811e0d89d412a2f5d8e16760e71d3b5c2702c (patch) | |
tree | ce621e2103a5eda53bc5bc59c038165576ba52cc /include | |
parent | efcb487a8e9a86874cf63c3fbf6c85bbf87e6d87 (diff) | |
download | op-kernel-dev-f26811e0d89d412a2f5d8e16760e71d3b5c2702c.zip op-kernel-dev-f26811e0d89d412a2f5d8e16760e71d3b5c2702c.tar.gz |
[MIPS] vr41xx: Update e55 setup function
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-mips/vr41xx/e55.h | 43 |
1 files changed, 0 insertions, 43 deletions
diff --git a/include/asm-mips/vr41xx/e55.h b/include/asm-mips/vr41xx/e55.h deleted file mode 100644 index 558f226..0000000 --- a/include/asm-mips/vr41xx/e55.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * e55.h, Include file for CASIO CASSIOPEIA E-10/15/55/65. - * - * Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __CASIO_E55_H -#define __CASIO_E55_H - -#include <asm/addrspace.h> -#include <asm/vr41xx/vr41xx.h> - -/* - * Board specific address mapping - */ -#define VR41XX_ISA_MEM_BASE 0x10000000 -#define VR41XX_ISA_MEM_SIZE 0x04000000 - -/* VR41XX_ISA_IO_BASE includes offset from real base. */ -#define VR41XX_ISA_IO_BASE 0x1400c000 -#define VR41XX_ISA_IO_SIZE 0x03ff4000 - -#define ISA_BUS_IO_BASE 0 -#define ISA_BUS_IO_SIZE VR41XX_ISA_IO_SIZE - -#define IO_PORT_BASE KSEG1ADDR(VR41XX_ISA_IO_BASE) -#define IO_PORT_RESOURCE_START ISA_BUS_IO_BASE -#define IO_PORT_RESOURCE_END (ISA_BUS_IO_BASE + ISA_BUS_IO_SIZE - 1) - -#endif /* __CASIO_E55_H */ |