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author | Corey Minyard <minyard@acm.org> | 2007-08-22 14:01:18 -0700 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-08-22 19:52:44 -0700 |
commit | ad4c2aa6354fad5316565b1cff57f80db0e04db8 (patch) | |
tree | fd4e320385760065e3f04b017093ff9495fc46b5 /include | |
parent | 999999616e45c603da45ee2667741fb7348629a5 (diff) | |
download | op-kernel-dev-ad4c2aa6354fad5316565b1cff57f80db0e04db8.zip op-kernel-dev-ad4c2aa6354fad5316565b1cff57f80db0e04db8.tar.gz |
Serial 8250: handle saving the clear-on-read bits from the LSR and MSR
Reading the LSR clears the break, parity, frame error, and overrun bits in
the 8250 chip, but these are not being saved in all places that read the
LSR. Same goes for the MSR delta bits. Save the LSR bits off whenever the
lsr is read so they can be handled later in the receive routine. Save the
MSR bits to be handled in the modem status routine.
Also, clear the stored bits and clear the interrupt registers before
enabling interrupts, to avoid handling old values of the stored bits in the
interrupt routines.
[akpm@linux-foundation.org: clean up pre-existing code]
Signed-off-by: Corey Minyard <minyard@acm.org>
Cc: Russell King <rmk+lkml@arm.linux.org.uk>
Cc: Yinghai Lu <yinghai.lu@sun.com>
Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
Acked-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/serial_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h index 1c5ed7d..96c0d93 100644 --- a/include/linux/serial_reg.h +++ b/include/linux/serial_reg.h @@ -118,6 +118,7 @@ #define UART_LSR_PE 0x04 /* Parity error indicator */ #define UART_LSR_OE 0x02 /* Overrun error indicator */ #define UART_LSR_DR 0x01 /* Receiver data ready */ +#define UART_LSR_BRK_ERROR_BITS 0x1E /* BI, FE, PE, OE bits */ #define UART_MSR 6 /* In: Modem Status Register */ #define UART_MSR_DCD 0x80 /* Data Carrier Detect */ |