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authorChris Dearman <chris@mips.com>2006-05-02 14:08:46 +0100
committerRalf Baechle <ralf@linux-mips.org>2006-06-01 00:28:30 +0100
commitc620953c32d301c2a7bc73f9f780301e110b7d7c (patch)
tree68be959e79ba34ca4704f1e2ad421eb404b34aa2 /include
parent98a41de99a4e4febe99b22c3a28d434caeb3165c (diff)
downloadop-kernel-dev-c620953c32d301c2a7bc73f9f780301e110b7d7c.zip
op-kernel-dev-c620953c32d301c2a7bc73f9f780301e110b7d7c.tar.gz
[MIPS] Fix detection and handling of the 74K processor.
Nothing exciting; Linux just didn't know it yet so this is most adding a value to a case statement. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-mips/cpu.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 818b9a9..0117138 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -87,6 +87,7 @@
#define PRID_IMP_24K 0x9300
#define PRID_IMP_34K 0x9500
#define PRID_IMP_24KE 0x9600
+#define PRID_IMP_74K 0x9700
/*
* These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
@@ -196,7 +197,8 @@
#define CPU_34K 60
#define CPU_PR4450 61
#define CPU_SB1A 62
-#define CPU_LAST 62
+#define CPU_74K 63
+#define CPU_LAST 63
/*
* ISA Level encodings
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