diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2005-09-03 15:56:11 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@evo.osdl.org> | 2005-09-05 00:06:04 -0700 |
commit | 07119621e62de0a2c8db6e4896e762c498bfdd17 (patch) | |
tree | c62dd52e8072235c8148e7f31b16ed30c5e45343 /include | |
parent | 7901c7998267d9d8c3f1b226a8c8cfd7f8e48a01 (diff) | |
download | op-kernel-dev-07119621e62de0a2c8db6e4896e762c498bfdd17.zip op-kernel-dev-07119621e62de0a2c8db6e4896e762c498bfdd17.tar.gz |
[PATCH] mips: add support for Qemu system architecture
Add support for the virtual MIPS system that is emulated by Qemu. See
http://www.linux-mips.org/wiki/Qemu for a detailed current status.
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-mips/mach-qemu/cpu-feature-overrides.h | 31 | ||||
-rw-r--r-- | include/asm-mips/mach-qemu/param.h | 13 | ||||
-rw-r--r-- | include/asm-mips/qemu.h | 24 |
3 files changed, 68 insertions, 0 deletions
diff --git a/include/asm-mips/mach-qemu/cpu-feature-overrides.h b/include/asm-mips/mach-qemu/cpu-feature-overrides.h new file mode 100644 index 0000000..f4e370e --- /dev/null +++ b/include/asm-mips/mach-qemu/cpu-feature-overrides.h @@ -0,0 +1,31 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2003 Ralf Baechle + */ +#ifndef __ASM_MACH_QEMU_CPU_FEATURE_OVERRIDES_H +#define __ASM_MACH_QEMU_CPU_FEATURE_OVERRIDES_H + +/* + * QEMU only comes with a hazard-free MIPS32 processor, so things are easy. + */ +#define cpu_has_mips16 0 +#define cpu_has_divec 0 +#define cpu_has_cache_cdex_p 0 +#define cpu_has_prefetch 0 +#define cpu_has_mcheck 0 +#define cpu_has_ejtag 0 + +#define cpu_has_llsc 1 +#define cpu_has_vtag_icache 0 +#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000) +#define cpu_has_ic_fills_f_dc 0 + +#define cpu_has_dsp 0 + +#define cpu_has_nofpuex 0 +#define cpu_has_64bits 0 + +#endif /* __ASM_MACH_QEMU_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-qemu/param.h b/include/asm-mips/mach-qemu/param.h new file mode 100644 index 0000000..cb30ee4 --- /dev/null +++ b/include/asm-mips/mach-qemu/param.h @@ -0,0 +1,13 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2005 by Ralf Baechle + */ +#ifndef __ASM_MACH_QEMU_PARAM_H +#define __ASM_MACH_QEMU_PARAM_H + +#define HZ 100 /* Internal kernel timer frequency */ + +#endif /* __ASM_MACH_QEMU_PARAM_H */ diff --git a/include/asm-mips/qemu.h b/include/asm-mips/qemu.h new file mode 100644 index 0000000..905c395 --- /dev/null +++ b/include/asm-mips/qemu.h @@ -0,0 +1,24 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2005 by Ralf Baechle (ralf@linux-mips.org) + */ +#ifndef __ASM_QEMU_H +#define __ASM_QEMU_H + +/* + * Interrupt numbers + */ +#define Q_PIC_IRQ_BASE 0 +#define Q_COUNT_COMPARE_IRQ 16 + +/* + * Qemu clock rate. Unlike on real MIPS this has no relation to the + * instruction issue rate, so the choosen value is pure fiction, just needs + * to match the value in Qemu itself. + */ +#define QEMU_C0_COUNTER_CLOCK 100000000 + +#endif /* __ASM_QEMU_H */ |