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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2007-06-22 23:22:06 +0900
committerRalf Baechle <ralf@linux-mips.org>2007-07-10 17:33:03 +0100
commitf74cf6ff99a49741b0f243996b621777b2d610d4 (patch)
tree5812f82646aadcbd451e528379548866c5ca790d /include
parent3896b05418b9b8548a678231db754206b3ebe56e (diff)
downloadop-kernel-dev-f74cf6ff99a49741b0f243996b621777b2d610d4.zip
op-kernel-dev-f74cf6ff99a49741b0f243996b621777b2d610d4.tar.gz
[MIPS] rbtx4938: Convert SPI codes to use generic SPI drivers
Use rtc-rs5c348 and at25 spi protocol driver and spi_txx9 spi controller driver instead of platform dependent codes. This patch also removes dependencies to old RTC interfaces such as rtc_mips_get_time, etc. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-mips/tx4938/rbtx4938.h6
-rw-r--r--include/asm-mips/tx4938/spi.h56
2 files changed, 1 insertions, 61 deletions
diff --git a/include/asm-mips/tx4938/rbtx4938.h b/include/asm-mips/tx4938/rbtx4938.h
index 0fbedaf..74e7d80 100644
--- a/include/asm-mips/tx4938/rbtx4938.h
+++ b/include/asm-mips/tx4938/rbtx4938.h
@@ -105,12 +105,6 @@
#define rbtx4938_pcireset_ptr \
((volatile unsigned char *)RBTX4938_PCIRESET_ADDR)
-/* SPI */
-#define RBTX4938_SEEPROM1_CHIPID 0
-#define RBTX4938_SEEPROM2_CHIPID 1
-#define RBTX4938_SEEPROM3_CHIPID 2
-#define RBTX4938_SRTC_CHIPID 3
-
/*
* IRQ mappings
*/
diff --git a/include/asm-mips/tx4938/spi.h b/include/asm-mips/tx4938/spi.h
index 0dbbab8..6a60c83 100644
--- a/include/asm-mips/tx4938/spi.h
+++ b/include/asm-mips/tx4938/spi.h
@@ -14,61 +14,7 @@
#ifndef __ASM_TX_BOARDS_TX4938_SPI_H
#define __ASM_TX_BOARDS_TX4938_SPI_H
-/* SPI */
-struct spi_dev_desc {
- unsigned int baud;
- unsigned short tcss, tcsh, tcsr; /* CS setup/hold/recovery time */
- unsigned int byteorder:1; /* 0:LSB-First, 1:MSB-First */
- unsigned int polarity:1; /* 0:High-Active */
- unsigned int phase:1; /* 0:Sample-Then-Shift */
-};
-
-extern void txx9_spi_init(unsigned long base, int (*cs_func)(int chipid, int on)) __init;
-extern void txx9_spi_irqinit(int irc_irq) __init;
-extern int txx9_spi_io(int chipid, struct spi_dev_desc *desc,
- unsigned char **inbufs, unsigned int *incounts,
- unsigned char **outbufs, unsigned int *outcounts,
- int cansleep);
-extern int spi_eeprom_write_enable(int chipid, int enable);
-extern int spi_eeprom_read_status(int chipid);
+extern int spi_eeprom_register(int chipid);
extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len);
-extern int spi_eeprom_write(int chipid, int address, unsigned char *buf, int len);
-extern void spi_eeprom_proc_create(struct proc_dir_entry *dir, int chipid) __init;
-
-#define TXX9_IMCLK (txx9_gbus_clock / 2)
-
-/*
-* SPI
-*/
-
-/* SPMCR : SPI Master Control */
-#define TXx9_SPMCR_OPMODE 0xc0
-#define TXx9_SPMCR_CONFIG 0x40
-#define TXx9_SPMCR_ACTIVE 0x80
-#define TXx9_SPMCR_SPSTP 0x02
-#define TXx9_SPMCR_BCLR 0x01
-
-/* SPCR0 : SPI Status */
-#define TXx9_SPCR0_TXIFL_MASK 0xc000
-#define TXx9_SPCR0_RXIFL_MASK 0x3000
-#define TXx9_SPCR0_SIDIE 0x0800
-#define TXx9_SPCR0_SOEIE 0x0400
-#define TXx9_SPCR0_RBSIE 0x0200
-#define TXx9_SPCR0_TBSIE 0x0100
-#define TXx9_SPCR0_IFSPSE 0x0010
-#define TXx9_SPCR0_SBOS 0x0004
-#define TXx9_SPCR0_SPHA 0x0002
-#define TXx9_SPCR0_SPOL 0x0001
-
-/* SPSR : SPI Status */
-#define TXx9_SPSR_TBSI 0x8000
-#define TXx9_SPSR_RBSI 0x4000
-#define TXx9_SPSR_TBS_MASK 0x3800
-#define TXx9_SPSR_RBS_MASK 0x0700
-#define TXx9_SPSR_SPOE 0x0080
-#define TXx9_SPSR_IFSD 0x0008
-#define TXx9_SPSR_SIDLE 0x0004
-#define TXx9_SPSR_STRDY 0x0002
-#define TXx9_SPSR_SRRDY 0x0001
#endif /* __ASM_TX_BOARDS_TX4938_SPI_H */
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