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authorRuss Anderson <rja@sgi.com>2007-10-16 17:02:38 -0500
committerTony Luck <tony.luck@intel.com>2007-11-09 13:05:30 -0800
commitb8de471f37dcafc8892a2e58c80764d7af221715 (patch)
tree47b2055ce6c794ceb461741449d714d3d03e6df1 /include
parentc9d059def234d7cd60809a6a122102ff96d2d0ca (diff)
downloadop-kernel-dev-b8de471f37dcafc8892a2e58c80764d7af221715.zip
op-kernel-dev-b8de471f37dcafc8892a2e58c80764d7af221715.tar.gz
[IA64] Update printing of feature set bits
Newer Itanium versions have added additional processor feature set bits. This patch prints all the implemented feature set bits. Some bit descriptions have not been made public. For those bits, a generic "Feature set X bit Y" message is printed. Bits that are not implemented will no longer be printed. Signed-off-by: Russ Anderson <rja@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/asm-ia64/pal.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h
index abfcb3a..8a695d3 100644
--- a/include/asm-ia64/pal.h
+++ b/include/asm-ia64/pal.h
@@ -1379,10 +1379,11 @@ struct pal_features_s;
static inline s64
ia64_pal_proc_get_features (u64 *features_avail,
u64 *features_status,
- u64 *features_control)
+ u64 *features_control,
+ u64 features_set)
{
struct ia64_pal_retval iprv;
- PAL_CALL_PHYS(iprv, PAL_PROC_GET_FEATURES, 0, 0, 0);
+ PAL_CALL_PHYS(iprv, PAL_PROC_GET_FEATURES, 0, features_set, 0);
if (iprv.status == 0) {
*features_avail = iprv.v0;
*features_status = iprv.v1;
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