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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-04-01 14:43:57 -0700
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-04-01 14:43:57 -0700
commit2e175a90047a2dbc76fde169c990164895b25dfc (patch)
treeddff26c8c44a4cb10594753785f7c8ee03000861 /include
parentc21b1e4d9b0c263a35f67eed2b025d053566c557 (diff)
parent398e692fd5cecdd25d311b47bbae69f7bac3a3cb (diff)
downloadop-kernel-dev-2e175a90047a2dbc76fde169c990164895b25dfc.zip
op-kernel-dev-2e175a90047a2dbc76fde169c990164895b25dfc.tar.gz
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 4298/1: fix memory barriers for DMA coherent and SMP platforms [ARM] 4295/2: Fix error-handling in pxaficp_ir.c (version 2) [ARM] Fix __NR_kexec_load [ARM] Export dma_channel_active() [ARM] 4296/1: ixp4xx: compile fix [ARM] 4289/1: AT91: SAM9260 NAND flash timing
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-ixp4xx/io.h17
-rw-r--r--include/asm-arm/system.h34
-rw-r--r--include/asm-arm/unistd.h2
3 files changed, 19 insertions, 34 deletions
diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h
index b7b5414..a41ba22 100644
--- a/include/asm-arm/arch-ixp4xx/io.h
+++ b/include/asm-arm/arch-ixp4xx/io.h
@@ -238,23 +238,6 @@ __ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count)
#define memcpy_fromio(a,c,l) _memcpy_fromio((a),(c),(l))
#define memcpy_toio(c,a,l) _memcpy_toio((c),(a),(l))
-static inline int
-check_signature(const unsigned char __iomem *bus_addr, const unsigned char *signature,
- int length)
-{
- int retval = 0;
- do {
- if (readb(bus_addr) != *signature)
- goto out;
- bus_addr++;
- signature++;
- length--;
- } while (length);
- retval = 1;
-out:
- return retval;
-}
-
#endif
#ifndef CONFIG_PCI
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index f06d8a4..69134c7 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -3,6 +3,7 @@
#ifdef __KERNEL__
+#include <asm/memory.h>
#define CPU_ARCH_UNKNOWN 0
#define CPU_ARCH_ARMv3 1
@@ -154,7 +155,7 @@ extern unsigned int user_debug;
#define vectors_high() (0)
#endif
-#if __LINUX_ARM_ARCH__ >= 6
+#if defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ >= 6
#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
: : "r" (0) : "memory")
#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
@@ -168,22 +169,23 @@ extern unsigned int user_debug;
#define dmb() __asm__ __volatile__ ("" : : : "memory")
#endif
-#define mb() barrier()
-#define rmb() barrier()
-#define wmb() barrier()
-#define read_barrier_depends() do { } while(0)
-
-#ifdef CONFIG_SMP
-#define smp_mb() dmb()
-#define smp_rmb() dmb()
-#define smp_wmb() dmb()
-#define smp_read_barrier_depends() read_barrier_depends()
+#ifndef CONFIG_SMP
+#define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
+#define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
+#define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
#else
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_read_barrier_depends() read_barrier_depends()
-#endif /* CONFIG_SMP */
+#define mb() dmb()
+#define rmb() dmb()
+#define wmb() dmb()
+#define smp_mb() dmb()
+#define smp_rmb() dmb()
+#define smp_wmb() dmb()
+#endif
+#define read_barrier_depends() do { } while(0)
+#define smp_read_barrier_depends() do { } while(0)
#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h
index 0991b7b..c025ab4 100644
--- a/include/asm-arm/unistd.h
+++ b/include/asm-arm/unistd.h
@@ -372,7 +372,7 @@
#define __NR_move_pages (__NR_SYSCALL_BASE+344)
#define __NR_getcpu (__NR_SYSCALL_BASE+345)
/* 346 for epoll_pwait */
-#define __NR_sys_kexec_load (__NR_SYSCALL_BASE+347)
+#define __NR_kexec_load (__NR_SYSCALL_BASE+347)
/*
* The following SWIs are ARM private.
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