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authorDave Airlie <airlied@redhat.com>2013-11-05 16:21:00 +1000
committerDave Airlie <airlied@redhat.com>2013-11-05 16:21:00 +1000
commit90c37067b70d6090a316227698a0cba40f8003bd (patch)
treeb556c667fb57da57c8323e069df27f1d5297c214 /include/uapi
parentcc87509d87696d7cd393882f5dedea01e03e41a9 (diff)
parent977386a04bae2a5a5092c965c92c7c4d36eed23f (diff)
downloadop-kernel-dev-90c37067b70d6090a316227698a0cba40f8003bd.zip
op-kernel-dev-90c37067b70d6090a316227698a0cba40f8003bd.tar.gz
Merge tag 'drm/for-3.13-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next
drm/tegra: Changes for v3.13-rc1 The biggest part of the changes is the decoupling of the host1x and DRM drivers followed by the move of Tegra DRM back to drivers/gpu/drm/tegra from whence it came. There is a lot of cleanup as well, and the drivers can now be properly unloaded and reloaded. HDMI support for the Tegra114 SoC was contributed by Mikko Perttunen. gr2d support was extended to Tegra114 and the gr3d driver that has been in the works for quite some time finally made it in. All pieces to run an OpenGL driver on top of an upstream kernel are now available. Support for syncpoint bases was added by Arto Merilainen. This is useful for synchronizing between command streams from different engines such as gr2d and gr3d. Erik Faye-Lund and Wei Yongjun contributed various small fixes. Thanks! * tag 'drm/for-3.13-rc1' of git://anongit.freedesktop.org/tegra/linux: (45 commits) drm/tegra: Reserve syncpoint base for gr3d drm/tegra: Reserve base for gr2d drm/tegra: Deliver syncpoint base to user space gpu: host1x: Add syncpoint base support gpu: host1x: Add 'flags' field to syncpt request drm/tegra: Disable clock on probe failure gpu: host1x: Disable clock on probe failure drm/tegra: Support bottom-up buffer objects drm/tegra: Add support for tiled buffer objects drm/tegra: Add 3D support drm/tegra: Introduce tegra_drm_submit() drm/tegra: Use symbolic names for gr2d registers drm/tegra: Start connectors with correct DPMS mode drm/tegra: hdmi: Enable VDD earlier for hotplug/DDC drm/tegra: hdmi: Fix build warnings drm/tegra: hdmi: Detect DVI-only displays drm/tegra: Add Tegra114 HDMI support drm/tegra: hdmi: Parameterize based on compatible property drm/tegra: hdmi: Rename tegra{2,3} to tegra{20,30} gpu: host1x: Add support for Tegra114 ...
Diffstat (limited to 'include/uapi')
-rw-r--r--include/uapi/drm/tegra_drm.h29
1 files changed, 20 insertions, 9 deletions
diff --git a/include/uapi/drm/tegra_drm.h b/include/uapi/drm/tegra_drm.h
index 73bde4e..5e1ab55 100644
--- a/include/uapi/drm/tegra_drm.h
+++ b/include/uapi/drm/tegra_drm.h
@@ -19,6 +19,9 @@
#include <drm/drm.h>
+#define DRM_TEGRA_GEM_CREATE_TILED (1 << 0)
+#define DRM_TEGRA_GEM_CREATE_BOTTOM_UP (1 << 1)
+
struct drm_tegra_gem_create {
__u64 size;
__u32 flags;
@@ -65,6 +68,12 @@ struct drm_tegra_get_syncpt {
__u32 id;
};
+struct drm_tegra_get_syncpt_base {
+ __u64 context;
+ __u32 syncpt;
+ __u32 id;
+};
+
struct drm_tegra_syncpt {
__u32 id;
__u32 incrs;
@@ -115,15 +124,16 @@ struct drm_tegra_submit {
__u32 reserved[5]; /* future expansion */
};
-#define DRM_TEGRA_GEM_CREATE 0x00
-#define DRM_TEGRA_GEM_MMAP 0x01
-#define DRM_TEGRA_SYNCPT_READ 0x02
-#define DRM_TEGRA_SYNCPT_INCR 0x03
-#define DRM_TEGRA_SYNCPT_WAIT 0x04
-#define DRM_TEGRA_OPEN_CHANNEL 0x05
-#define DRM_TEGRA_CLOSE_CHANNEL 0x06
-#define DRM_TEGRA_GET_SYNCPT 0x07
-#define DRM_TEGRA_SUBMIT 0x08
+#define DRM_TEGRA_GEM_CREATE 0x00
+#define DRM_TEGRA_GEM_MMAP 0x01
+#define DRM_TEGRA_SYNCPT_READ 0x02
+#define DRM_TEGRA_SYNCPT_INCR 0x03
+#define DRM_TEGRA_SYNCPT_WAIT 0x04
+#define DRM_TEGRA_OPEN_CHANNEL 0x05
+#define DRM_TEGRA_CLOSE_CHANNEL 0x06
+#define DRM_TEGRA_GET_SYNCPT 0x07
+#define DRM_TEGRA_SUBMIT 0x08
+#define DRM_TEGRA_GET_SYNCPT_BASE 0x09
#define DRM_IOCTL_TEGRA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_CREATE, struct drm_tegra_gem_create)
#define DRM_IOCTL_TEGRA_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_MMAP, struct drm_tegra_gem_mmap)
@@ -134,5 +144,6 @@ struct drm_tegra_submit {
#define DRM_IOCTL_TEGRA_CLOSE_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_CLOSE_CHANNEL, struct drm_tegra_open_channel)
#define DRM_IOCTL_TEGRA_GET_SYNCPT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT, struct drm_tegra_get_syncpt)
#define DRM_IOCTL_TEGRA_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SUBMIT, struct drm_tegra_submit)
+#define DRM_IOCTL_TEGRA_GET_SYNCPT_BASE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT_BASE, struct drm_tegra_get_syncpt_base)
#endif
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