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author | Chris Wilson <chris@chris-wilson.co.uk> | 2017-04-12 12:01:11 +0100 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2017-04-12 12:35:17 +0100 |
commit | e22d8e3c69a9f432b40baaaf3f894a128fdc2222 (patch) | |
tree | f076dadac5c963736a8fe1a25d31013f512d0366 /include/uapi | |
parent | ef74921bc679232c6590afa881d3ea605ebdddd8 (diff) | |
download | op-kernel-dev-e22d8e3c69a9f432b40baaaf3f894a128fdc2222.zip op-kernel-dev-e22d8e3c69a9f432b40baaaf3f894a128fdc2222.tar.gz |
drm/i915: Treat WC a separate cache domain
When discussing a new WC mmap, we based the interface upon the
assumption that GTT was fully coherent. How naive! Commits 3b5724d702ef
("drm/i915: Wait for writes through the GTT to land before reading
back") and ed4596ea992d ("drm/i915/guc: WA to address the Ringbuffer
coherency issue") demonstrate that writes through the GTT are indeed
delayed and may be overtaken by direct WC access. To be safe, if
userspace is mixing WC mmaps with other potential GTT access (pwrite,
GTT mmaps) it should use set_domain(WC).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96563
Testcase: igt/gem_pwrite/small-gtt*
Testcase: igt/drv_selftest/coherency
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170412110111.26626-2-chris@chris-wilson.co.uk
Diffstat (limited to 'include/uapi')
-rw-r--r-- | include/uapi/drm/i915_drm.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index 3554495..9ee06ec 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -666,6 +666,8 @@ struct drm_i915_gem_relocation_entry { #define I915_GEM_DOMAIN_VERTEX 0x00000020 /** GTT domain - aperture and scanout */ #define I915_GEM_DOMAIN_GTT 0x00000040 +/** WC domain - uncached access */ +#define I915_GEM_DOMAIN_WC 0x00000080 /** @} */ struct drm_i915_gem_exec_object { |