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authorMichel Dänzer <michel.daenzer@amd.com>2013-11-18 18:26:00 +0900
committerAlex Deucher <alexander.deucher@amd.com>2013-11-18 09:19:36 -0500
commit32f79a8a82b2ff6f1828b258da214869adc2a28c (patch)
tree660ce0abbf61ca8d13a8d8d5c7c2d98199d856f3 /include/uapi
parent1ddce27d8f0ae3f911850e06a4937de89645dfa7 (diff)
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drm/radeon/cik: Add macrotile mode array query
This is required to properly calculate the tiling parameters in userspace. Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/uapi')
-rw-r--r--include/uapi/drm/radeon_drm.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h
index 46d41e8..2f3f7ea 100644
--- a/include/uapi/drm/radeon_drm.h
+++ b/include/uapi/drm/radeon_drm.h
@@ -981,6 +981,8 @@ struct drm_radeon_cs {
#define RADEON_INFO_SI_TILE_MODE_ARRAY 0x16
/* query if CP DMA is supported on the compute ring */
#define RADEON_INFO_SI_CP_DMA_COMPUTE 0x17
+/* CIK macrotile mode array */
+#define RADEON_INFO_CIK_MACROTILE_MODE_ARRAY 0x18
struct drm_radeon_info {
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