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author | Mathias Krause <minipli@googlemail.com> | 2010-11-27 16:34:46 +0800 |
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committer | Herbert Xu <herbert@gondor.apana.org.au> | 2010-11-27 16:34:46 +0800 |
commit | 0d258efb6a58fe047197c3b9cff8746bb176d58a (patch) | |
tree | 8576f2af5212ec50509de1071cf7afe1ed9531a8 /include/rxrpc | |
parent | 21ea28abcf825729f9698afd7357dfbf7040d4f8 (diff) | |
download | op-kernel-dev-0d258efb6a58fe047197c3b9cff8746bb176d58a.zip op-kernel-dev-0d258efb6a58fe047197c3b9cff8746bb176d58a.tar.gz |
crypto: aesni-intel - Ported implementation to x86-32
The AES-NI instructions are also available in legacy mode so the 32-bit
architecture may profit from those, too.
To illustrate the performance gain here's a short summary of a dm-crypt
speed test on a Core i7 M620 running at 2.67GHz comparing both assembler
implementations:
x86: i568 aes-ni delta
ECB, 256 bit: 93.8 MB/s 123.3 MB/s +31.4%
CBC, 256 bit: 84.8 MB/s 262.3 MB/s +209.3%
LRW, 256 bit: 108.6 MB/s 222.1 MB/s +104.5%
XTS, 256 bit: 105.0 MB/s 205.5 MB/s +95.7%
Additionally, due to some minor optimizations, the 64-bit version also
got a minor performance gain as seen below:
x86-64: old impl. new impl. delta
ECB, 256 bit: 121.1 MB/s 123.0 MB/s +1.5%
CBC, 256 bit: 285.3 MB/s 290.8 MB/s +1.9%
LRW, 256 bit: 263.7 MB/s 265.3 MB/s +0.6%
XTS, 256 bit: 251.1 MB/s 255.3 MB/s +1.7%
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'include/rxrpc')
0 files changed, 0 insertions, 0 deletions