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authorJeff Garzik <jgarzik@pobox.com>2005-11-18 11:30:38 -0500
committerJeff Garzik <jgarzik@pobox.com>2005-11-18 11:30:38 -0500
commit79bfb0a98fdc73ed6a18469cef245cbf50a1d8bb (patch)
treefaf5312c25eebfa11bd1f65c881bfac07c945f2b /include/linux
parent67cb6e842e7f1e534a5e0e8708a8779e33b60520 (diff)
parentfc71fe40d2bedcc57d3406bf2050481f8b3441b6 (diff)
downloadop-kernel-dev-79bfb0a98fdc73ed6a18469cef245cbf50a1d8bb.zip
op-kernel-dev-79bfb0a98fdc73ed6a18469cef245cbf50a1d8bb.tar.gz
Merge branch 'master'
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/ds17287rtc.h67
-rw-r--r--include/linux/ds1742rtc.h53
-rw-r--r--include/linux/pci_ids.h1
3 files changed, 121 insertions, 0 deletions
diff --git a/include/linux/ds17287rtc.h b/include/linux/ds17287rtc.h
new file mode 100644
index 0000000..c281ba4
--- /dev/null
+++ b/include/linux/ds17287rtc.h
@@ -0,0 +1,67 @@
+/*
+ * ds17287rtc.h - register definitions for the ds1728[57] RTC / CMOS RAM
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * (C) 2003 Guido Guenther <agx@sigxcpu.org>
+ */
+#ifndef __LINUX_DS17287RTC_H
+#define __LINUX_DS17287RTC_H
+
+#include <linux/rtc.h> /* get the user-level API */
+#include <linux/spinlock.h> /* spinlock_t */
+#include <linux/mc146818rtc.h>
+
+/* Register A */
+#define DS_REGA_DV2 0x40 /* countdown chain */
+#define DS_REGA_DV1 0x20 /* oscillator enable */
+#define DS_REGA_DV0 0x10 /* bank select */
+
+/* bank 1 registers */
+#define DS_B1_MODEL 0x40 /* model number byte */
+#define DS_B1_SN1 0x41 /* serial number byte 1 */
+#define DS_B1_SN2 0x42 /* serial number byte 2 */
+#define DS_B1_SN3 0x43 /* serial number byte 3 */
+#define DS_B1_SN4 0x44 /* serial number byte 4 */
+#define DS_B1_SN5 0x45 /* serial number byte 5 */
+#define DS_B1_SN6 0x46 /* serial number byte 6 */
+#define DS_B1_CRC 0x47 /* CRC byte */
+#define DS_B1_CENTURY 0x48 /* Century byte */
+#define DS_B1_DALARM 0x49 /* date alarm */
+#define DS_B1_XCTRL4A 0x4a /* extendec control register 4a */
+#define DS_B1_XCTRL4B 0x4b /* extendec control register 4b */
+#define DS_B1_RTCADDR2 0x4e /* rtc address 2 */
+#define DS_B1_RTCADDR3 0x4f /* rtc address 3 */
+#define DS_B1_RAMLSB 0x50 /* extended ram LSB */
+#define DS_B1_RAMMSB 0x51 /* extended ram MSB */
+#define DS_B1_RAMDPORT 0x53 /* extended ram data port */
+
+/* register details */
+/* extended control register 4a */
+#define DS_XCTRL4A_VRT2 0x80 /* valid ram and time */
+#define DS_XCTRL4A_INCR 0x40 /* increment progress status */
+#define DS_XCTRL4A_BME 0x20 /* burst mode enable */
+#define DS_XCTRL4A_PAB 0x08 /* power active bar ctrl */
+#define DS_XCTRL4A_RF 0x04 /* ram clear flag */
+#define DS_XCTRL4A_WF 0x02 /* wake up alarm flag */
+#define DS_XCTRL4A_KF 0x01 /* kickstart flag */
+
+/* interrupt causes */
+#define DS_XCTRL4A_IFS (DS_XCTRL4A_RF|DS_XCTRL4A_WF|DS_XCTRL4A_KF)
+
+/* extended control register 4b */
+#define DS_XCTRL4B_ABE 0x80 /* auxiliary battery enable */
+#define DS_XCTRL4B_E32K 0x40 /* enable 32.768 kHz Output */
+#define DS_XCTRL4B_CS 0x20 /* crystal select */
+#define DS_XCTRL4B_RCE 0x10 /* ram clear enable */
+#define DS_XCTRL4B_PRS 0x08 /* PAB resec select */
+#define DS_XCTRL4B_RIE 0x04 /* ram clear interrupt enable */
+#define DS_XCTRL4B_WFE 0x02 /* wake up alarm interrupt enable */
+#define DS_XCTRL4B_KFE 0x01 /* kickstart interrupt enable */
+
+/* interrupt enable bits */
+#define DS_XCTRL4B_IFES (DS_XCTRL4B_RIE|DS_XCTRL4B_WFE|DS_XCTRL4B_KFE)
+
+#endif /* __LINUX_DS17287RTC_H */
diff --git a/include/linux/ds1742rtc.h b/include/linux/ds1742rtc.h
new file mode 100644
index 0000000..a83cdd1
--- /dev/null
+++ b/include/linux/ds1742rtc.h
@@ -0,0 +1,53 @@
+/*
+ * ds1742rtc.h - register definitions for the Real-Time-Clock / CMOS RAM
+ *
+ * Copyright (C) 1999-2001 Toshiba Corporation
+ * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
+ *
+ * Permission is hereby granted to copy, modify and redistribute this code
+ * in terms of the GNU Library General Public License, Version 2 or later,
+ * at your option.
+ */
+#ifndef __LINUX_DS1742RTC_H
+#define __LINUX_DS1742RTC_H
+
+#include <asm/ds1742.h>
+
+#define RTC_BRAM_SIZE 0x800
+#define RTC_OFFSET 0x7f8
+
+/*
+ * Register summary
+ */
+#define RTC_CONTROL (RTC_OFFSET + 0)
+#define RTC_CENTURY (RTC_OFFSET + 0)
+#define RTC_SECONDS (RTC_OFFSET + 1)
+#define RTC_MINUTES (RTC_OFFSET + 2)
+#define RTC_HOURS (RTC_OFFSET + 3)
+#define RTC_DAY (RTC_OFFSET + 4)
+#define RTC_DATE (RTC_OFFSET + 5)
+#define RTC_MONTH (RTC_OFFSET + 6)
+#define RTC_YEAR (RTC_OFFSET + 7)
+
+#define RTC_CENTURY_MASK 0x3f
+#define RTC_SECONDS_MASK 0x7f
+#define RTC_DAY_MASK 0x07
+
+/*
+ * Bits in the Control/Century register
+ */
+#define RTC_WRITE 0x80
+#define RTC_READ 0x40
+
+/*
+ * Bits in the Seconds register
+ */
+#define RTC_STOP 0x80
+
+/*
+ * Bits in the Day register
+ */
+#define RTC_BATT_FLAG 0x80
+#define RTC_FREQ_TEST 0x40
+
+#endif /* __LINUX_DS1742RTC_H */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index d4c1c8f..7b387fa 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1401,6 +1401,7 @@
#define PCI_SUBDEVICE_ID_KEYSPAN_SX2 0x5334
#define PCI_VENDOR_ID_MARVELL 0x11ab
+#define PCI_DEVICE_ID_MARVELL_GT64111 0x4146
#define PCI_DEVICE_ID_MARVELL_GT64260 0x6430
#define PCI_DEVICE_ID_MARVELL_MV64360 0x6460
#define PCI_DEVICE_ID_MARVELL_MV64460 0x6480
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