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| author | Kristen Carlson Accardi <kristen.c.accardi@intel.com> | 2006-07-12 08:59:00 -0700 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2006-07-12 16:05:48 -0700 |
| commit | ffadcc2ff42ecedf71ea67d9051ff028927aed08 (patch) | |
| tree | 540351be72173f69c552c05dfeffd0804ca0bd6b /include/linux | |
| parent | 6f0312fd7e0e6f96fd847b0b2e1e0d2d2e8ef89d (diff) | |
| download | op-kernel-dev-ffadcc2ff42ecedf71ea67d9051ff028927aed08.zip op-kernel-dev-ffadcc2ff42ecedf71ea67d9051ff028927aed08.tar.gz | |
[PATCH] PCI: PCIE power management quirk
When changing power states from D0->DX and then from DX->D0, some
Intel PCIE chipsets will cause a device reset to occur. This will
cause problems for any D State other than D3, since any state
information that the driver will expect to be present coming from
a D1 or D2 state will have been cleared. This patch addes a
flag to the pci_dev structure to indicate that devices should
not use states D1 or D2, and will set that flag for the affected
chipsets. This patch also modifies pci_set_power_state() so that
when a device driver tries to set the power state on
a device that is downstream from an affected chipset, or on one
of the affected devices it only allows state changes to or
from D0 & D3. In addition, this patch allows the delay time
between D3->D0 to be changed via a quirk. These chipsets also
need additional time to change states beyond the normal 10ms.
Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/pci.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h index 983fca2..8565b81 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -161,6 +161,7 @@ struct pci_dev { unsigned int is_enabled:1; /* pci_enable_device has been called */ unsigned int is_busmaster:1; /* device is busmaster */ unsigned int no_msi:1; /* device may not use msi */ + unsigned int no_d1d2:1; /* only allow d0 or d3 */ unsigned int block_ucfg_access:1; /* userspace config space access is blocked */ unsigned int broken_parity_status:1; /* Device generates false positive parity */ unsigned int msi_enabled:1; |
