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author | David Brownell <dbrownell@users.sourceforge.net> | 2009-06-30 11:41:26 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-30 18:56:00 -0700 |
commit | b55f627feeb9d48fdbde3835e18afbc76712e49b (patch) | |
tree | 1c6084d44f23c5e70040e5d62c93718f77ad09da /include/linux/spi/spi.h | |
parent | c49568235dd7b4a2ffad63aa950562f4ffb9455f (diff) | |
download | op-kernel-dev-b55f627feeb9d48fdbde3835e18afbc76712e49b.zip op-kernel-dev-b55f627feeb9d48fdbde3835e18afbc76712e49b.tar.gz |
spi: new spi->mode bits
Add two new spi_device.mode bits to accomodate more protocol options, and
pass them through to usermode drivers:
* SPI_NO_CS ... a second 3-wire variant, where the chipselect
line is removed instead of a data line; transfers are still
full duplex.
This obviously has STRONG protocol implications since the
chipselect transitions can't be used to synchronize state
transitions with the SPI master.
* SPI_READY ... defines open drain signal that's pulled low
to pause the clock. This defines a 5-wire variant (normal
4-wire SPI plus READY) and two 4-wire variants (READY plus
each of the 3-wire flavors).
Such hardware flow control can be a big win. There are ADC
converters and flash chips that expose READY signals, but not
many host controllers support it today.
The spi_bitbang code should be changed to use SPI_NO_CS instead of its
current nonportable hack. That's a mode most hardware can easily support
(unlike SPI_READY).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Cc: "Paulraj, Sandeep" <s-paulraj@ti.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/linux/spi/spi.h')
-rw-r--r-- | include/linux/spi/spi.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 9c4cd27..743c933 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -80,6 +80,8 @@ struct spi_device { #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */ #define SPI_3WIRE 0x10 /* SI/SO signals shared */ #define SPI_LOOP 0x20 /* loopback mode */ +#define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */ +#define SPI_READY 0x80 /* slave pulls low to pause */ u8 bits_per_word; int irq; void *controller_state; |