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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2015-10-20 17:25:09 +0900 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2015-10-27 11:07:49 +0100 |
commit | bac7f4c1bf5e7c6ccd5bb71edc015b26c77f7460 (patch) | |
tree | 68d91f45d4e1c2f9d5ef283e2bbb460144c9f63e /include/linux/quicklist.h | |
parent | e0548004d433e4454c5d129a5c5b0905442bfe8e (diff) | |
download | op-kernel-dev-bac7f4c1bf5e7c6ccd5bb71edc015b26c77f7460.zip op-kernel-dev-bac7f4c1bf5e7c6ccd5bb71edc015b26c77f7460.tar.gz |
pinctrl: uniphier: set input-enable before pin-muxing
While IECTRL is disabled, input signals are pulled-down internally.
If pin-muxing is set up first, glitch signals (Low to High transition)
might be input to hardware blocks.
Bad case scenario:
[1] The hardware block is already running before pinctrl is handled.
(the reset is de-asserted by default or by a firmware, for example)
[2] The pin-muxing is set up. The input signals to hardware block
are pulled-down by the chip-internal biasing.
[3] The pins are input-enabled. The signals from the board reach the
hardware block.
Actually, one invalid character is input to the UART blocks for such
SoCs as PH1-LD4, PH1-sLD8, where UART devices start to run at the
power on reset.
To avoid such problems, pins should be input-enabled before muxing.
Fixes: 6e9088920258 ("pinctrl: UniPhier: add UniPhier pinctrl core support")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Dai Okamura <okamura.dai@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'include/linux/quicklist.h')
0 files changed, 0 insertions, 0 deletions