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authorChristian Ruppert <christian.ruppert@abilis.com>2013-06-13 14:55:31 +0200
committerLinus Walleij <linus.walleij@linaro.org>2013-06-17 18:18:28 +0200
commitc8587eeef8fc219e806e868c6f0c7170c769efab (patch)
treee97d8c30c967cf08b8b92d4653acebe52f942ca8 /include/linux/pinctrl
parent5ace03fb6abfa3b316c7ee6a105959cb45bd4af4 (diff)
downloadop-kernel-dev-c8587eeef8fc219e806e868c6f0c7170c769efab.zip
op-kernel-dev-c8587eeef8fc219e806e868c6f0c7170c769efab.tar.gz
pinctrl: add pin list based GPIO ranges
Traditionally, GPIO ranges are based on consecutive ranges of both GPIO and pin numbers. This patch allows for GPIO ranges with arbitrary lists of pin numbers. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'include/linux/pinctrl')
-rw-r--r--include/linux/pinctrl/pinctrl.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/include/linux/pinctrl/pinctrl.h b/include/linux/pinctrl/pinctrl.h
index 2c2a9e8..176a6c1b 100644
--- a/include/linux/pinctrl/pinctrl.h
+++ b/include/linux/pinctrl/pinctrl.h
@@ -49,7 +49,8 @@ struct pinctrl_pin_desc {
* @name: a name for the chip in this range
* @id: an ID number for the chip in this range
* @base: base offset of the GPIO range
- * @pin_base: base pin number of the GPIO range
+ * @pin_base: base pin number of the GPIO range if pins != NULL
+ * @pins: enumeration of pins in GPIO range or NULL
* @npins: number of pins in the GPIO range, including the base number
* @gc: an optional pointer to a gpio_chip
*/
@@ -59,6 +60,7 @@ struct pinctrl_gpio_range {
unsigned int id;
unsigned int base;
unsigned int pin_base;
+ unsigned const *pins;
unsigned int npins;
struct gpio_chip *gc;
};
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