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authorHans Rosenfeld <hans.rosenfeld@amd.com>2011-01-24 16:05:42 +0100
committerIngo Molnar <mingo@elte.hu>2011-01-26 08:28:23 +0100
commit41b2610c3443e6c4760e61fc10eef73f96f9f6a5 (patch)
treec88ed29b417ef4e034c177428cdec320b8a66659 /include/linux/pci_ids.h
parentb453de02b786c63b8928ec822401468131db0a9b (diff)
downloadop-kernel-dev-41b2610c3443e6c4760e61fc10eef73f96f9f6a5.zip
op-kernel-dev-41b2610c3443e6c4760e61fc10eef73f96f9f6a5.tar.gz
x86, amd: Extend AMD northbridge caching code to support "Link Control" devices
"Link Control" devices (NB function 4) will be used by L3 cache partitioning on family 0x15. Signed-off-by: Hans Rosenfeld <hans.rosenfeld@amd.com> Cc: <andreas.herrmann3@amd.com> LKML-Reference: <1295881543-572552-4-git-send-email-hans.rosenfeld@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/linux/pci_ids.h')
-rw-r--r--include/linux/pci_ids.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 3adb06e..580de67 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -518,6 +518,7 @@
#define PCI_DEVICE_ID_AMD_11H_NB_MISC 0x1303
#define PCI_DEVICE_ID_AMD_11H_NB_LINK 0x1304
#define PCI_DEVICE_ID_AMD_15H_NB_MISC 0x1603
+#define PCI_DEVICE_ID_AMD_15H_NB_LINK 0x1604
#define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703
#define PCI_DEVICE_ID_AMD_LANCE 0x2000
#define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001
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