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authorMaciej W. Rozycki <macro@linux-mips.org>2006-10-02 12:55:09 +0100
committerRalf Baechle <ralf@linux-mips.org>2006-10-03 17:59:17 +0100
commit15a1c5140436c5be7673a4709c5d7e1f3cd7bdd9 (patch)
tree0ec2b255917f916c072af27eeeb2b76d9d361ff9 /include/linux/pci_ids.h
parent3a42aa934856bfe3f28946f66ea8a5f056445747 (diff)
downloadop-kernel-dev-15a1c5140436c5be7673a4709c5d7e1f3cd7bdd9.zip
op-kernel-dev-15a1c5140436c5be7673a4709c5d7e1f3cd7bdd9.tar.gz
[MIPS] BCM1250: TRDY timeout tweaks for Broadcom SiByte systems
It was obesrved that at least one older PCI card predating the requirement for the TRDY signal to respond within 16 clock ticks actually does not meet this rule nor even the power-on defaults of the PCI bridges found in development systems built around the Broadcom SiByte SOCs. Here is a patch that bumps up the timeout to the highest finite value supported by these chips, which is 255 clock ticks. The bridges affected are the SiByte SOC itself and the SP1011. This change does not effectively affect systems only having PCI option cards installed that meet the TRDY requirement of the current PCI spec. The rule was introduced with PCI 2.1, so any older card may make the system affected. If this is the case, performance of the system will suffer in return for the card working at all. If this is a concern, then the solution is not to use such cards. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---
Diffstat (limited to 'include/linux/pci_ids.h')
-rw-r--r--include/linux/pci_ids.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index c9ffbc3..dc7f573 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1883,6 +1883,8 @@
#define PCI_DEVICE_ID_PANACOM_QUADMODEM 0x0400
#define PCI_DEVICE_ID_PANACOM_DUALMODEM 0x0402
+#define PCI_VENDOR_ID_SIPACKETS 0x14d9
+#define PCI_DEVICE_ID_SP1011 0x0010
#define PCI_VENDOR_ID_AFAVLAB 0x14db
#define PCI_DEVICE_ID_AFAVLAB_P028 0x2180
@@ -1997,6 +1999,7 @@
#define PCI_DEVICE_ID_FARSITE_TE1C 0x1612
#define PCI_VENDOR_ID_SIBYTE 0x166d
+#define PCI_DEVICE_ID_BCM1250_PCI 0x0001
#define PCI_DEVICE_ID_BCM1250_HT 0x0002
#define PCI_VENDOR_ID_NETCELL 0x169c
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